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InstCombine: Simplify FoldICmpCstShrCst

Browse Source 
This function was complicated by the fact that it tried to perform
canonicalizations that were already preformed by InstSimplify.  Remove
this extra code and move the tests over to InstSimplify.  Add asserts to
make sure our preconditions hold before we make any assumptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220314 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Majnemer 2014-10-21 19:51:55 +00:00
parent 4af7ead7bd
commit dea8105323
4 changed files with 348 additions and 378 deletions
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64
lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -1052,69 +1052,37 @@ Instruction *InstCombiner::FoldICmpCstShrCst(ICmpInst &I, Value *Op, Value *A,
APInt AP1 = CI1->getValue();
APInt AP2 = CI2->getValue();
if (!AP1) {
if (!AP2) {
// Both Constants are 0.
return getConstant(true);
}
if (cast<BinaryOperator>(Op)->isExact())
return getConstant(false);
if (AP2.isNegative()) {
// MSB is set, so a lshr with a large enough 'A' would be undefined.
return getConstant(false);
}
assert(AP2 != 0 && "Handled in InstSimplify");
assert(!AP2.isAllOnesValue() && "Handled in InstSimplify");
if (!AP1)
// 'A' must be large enough to shift out the highest set bit.
return getICmp(I.ICMP_UGT, A,
ConstantInt::get(A->getType(), AP2.logBase2()));
}
if (!AP2) {
// Shifting 0 by any value gives 0.
return getConstant(false);
}
if (AP1 == AP2)
return getICmp(I.ICMP_EQ, A, ConstantInt::getNullValue(A->getType()));
bool IsAShr = isa<AShrOperator>(Op);
if (AP1 == AP2) {
if (AP1.isAllOnesValue() && IsAShr) {
// Arithmatic shift of -1 is always -1.
return getConstant(true);
}
return getICmp(I.ICMP_EQ, A, ConstantInt::getNullValue(A->getType()));
}
bool IsNegative = false;
if (IsAShr) {
if (AP1.isNegative() != AP2.isNegative()) {
// Arithmetic shift will never change the sign.
return getConstant(false);
}
// Both the constants are negative, take their positive to calculate log.
if (AP1.isNegative()) {
if (AP1.slt(AP2))
// Right-shifting won't increase the magnitude.
return getConstant(false);
IsNegative = true;
}
}
if (!IsNegative && AP1.ugt(AP2))
// Right-shifting will not increase the value.
return getConstant(false);
// If we are dealing with an arithmetic shift, both constants should agree in
// sign. InstSimplify's SimplifyICmpInst range analysis is supposed to catch
// the cases when they disagree.
assert((!IsAShr || (AP1.isNegative() == AP2.isNegative() && AP1.sgt(AP2))) &&
"Handled in InstSimplify");
// Get the distance between the highest bit that's set.
int Shift;
if (IsNegative)
// Both the constants are negative, take their positive to calculate log.
if (IsAShr && AP1.isNegative())
// Get the ones' complement of AP2 and AP1 when computing the distance.
Shift = (~AP2).logBase2() - (~AP1).logBase2();
else
Shift = AP2.logBase2() - AP1.logBase2();
if (IsAShr ? AP1 == AP2.ashr(Shift) : AP1 == AP2.lshr(Shift))
return getICmp(I.ICMP_EQ, A, ConstantInt::get(A->getType(), Shift));
if (Shift > 0) {
if (IsAShr ? AP1 == AP2.ashr(Shift) : AP1 == AP2.lshr(Shift))
return getICmp(I.ICMP_EQ, A, ConstantInt::get(A->getType(), Shift));
}
// Shifting const2 will never be equal to const1.
return getConstant(false);
}

320
test/Transforms/InstCombine/icmp-shr.ll
View File

@ -2,134 +2,6 @@
target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
; CHECK-LABEL: @exact_lshr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_eq_both_zero(i8 %a) {
%shr = lshr exact i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_eq_both_zero(i8 %a) {
%shr = ashr exact i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_lshr_eq_both_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_ashr_eq_both_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_ne_both_zero(i8 %a) {
%shr = lshr exact i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_ne_both_zero(i8 %a) {
%shr = ashr exact i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_lshr_ne_both_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_ashr_ne_both_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_eq_last_zero(i8 %a) {
%shr = lshr exact i8 128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_eq_last_zero(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_ne_last_zero(i8 %a) {
%shr = lshr exact i8 128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_ne_last_zero(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_lshr_eq_last_zero(i8 %a) {
%shr = lshr i8 128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_ashr_eq_last_zero(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_lshr_ne_last_zero(i8 %a) {
%shr = lshr i8 128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_ashr_ne_last_zero(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @lshr_eq_msb_low_last_zero
; CHECK-NEXT: icmp ugt i8 %a, 6
define i1 @lshr_eq_msb_low_last_zero(i8 %a) {
@ -162,70 +34,6 @@ define i1 @ashr_ne_msb_low_second_zero(i8 %a) {
ret i1 %cmp
}
; CHECK-LABEL: @lshr_eq_first_zero
; CHECK-NEXT: ret i1 false
define i1 @lshr_eq_first_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp eq i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @ashr_eq_first_zero
; CHECK-NEXT: ret i1 false
define i1 @ashr_eq_first_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp eq i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @lshr_ne_first_zero
; CHECK-NEXT: ret i1 true
define i1 @lshr_ne_first_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp ne i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @ashr_ne_first_zero
; CHECK-NEXT: ret i1 true
define i1 @ashr_ne_first_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp ne i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @ashr_eq_both_minus1
; CHECK-NEXT: ret i1 true
define i1 @ashr_eq_both_minus1(i8 %a) {
%shr = ashr i8 -1, %a
%cmp = icmp eq i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @ashr_ne_both_minus1
; CHECK-NEXT: ret i1 false
define i1 @ashr_ne_both_minus1(i8 %a) {
%shr = ashr i8 -1, %a
%cmp = icmp ne i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_both_minus1
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_eq_both_minus1(i8 %a) {
%shr = ashr exact i8 -1, %a
%cmp = icmp eq i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_both_minus1
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_ne_both_minus1(i8 %a) {
%shr = ashr exact i8 -1, %a
%cmp = icmp ne i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @ashr_eq_both_equal
; CHECK-NEXT: icmp eq i8 %a, 0
define i1 @ashr_eq_both_equal(i8 %a) {
@ -290,22 +98,6 @@ define i1 @exact_lshr_ne_both_equal(i8 %a) {
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_opposite_msb
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_eq_opposite_msb(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp eq i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @ashr_eq_opposite_msb
; CHECK-NEXT: ret i1 false
define i1 @ashr_eq_opposite_msb(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp eq i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_eq_opposite_msb
; CHECK-NEXT: icmp eq i8 %a, 7
define i1 @exact_lshr_eq_opposite_msb(i8 %a) {
@ -322,22 +114,6 @@ define i1 @lshr_eq_opposite_msb(i8 %a) {
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_opposite_msb
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_ne_opposite_msb(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp ne i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @ashr_ne_opposite_msb
; CHECK-NEXT: ret i1 true
define i1 @ashr_ne_opposite_msb(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp ne i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_opposite_msb
; CHECK-NEXT: icmp ne i8 %a, 7
define i1 @exact_lshr_ne_opposite_msb(i8 %a) {
@ -354,70 +130,6 @@ define i1 @lshr_ne_opposite_msb(i8 %a) {
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_shift_gt
; CHECK-NEXT : ret i1 false
define i1 @exact_ashr_eq_shift_gt(i8 %a) {
%shr = ashr exact i8 -2, %a
%cmp = icmp eq i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_shift_gt
; CHECK-NEXT : ret i1 true
define i1 @exact_ashr_ne_shift_gt(i8 %a) {
%shr = ashr exact i8 -2, %a
%cmp = icmp ne i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_eq_shift_gt
; CHECK-NEXT : ret i1 false
define i1 @nonexact_ashr_eq_shift_gt(i8 %a) {
%shr = ashr i8 -2, %a
%cmp = icmp eq i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_ne_shift_gt
; CHECK-NEXT : ret i1 true
define i1 @nonexact_ashr_ne_shift_gt(i8 %a) {
%shr = ashr i8 -2, %a
%cmp = icmp ne i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_eq_shift_gt
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_eq_shift_gt(i8 %a) {
%shr = lshr exact i8 2, %a
%cmp = icmp eq i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_shift_gt
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_ne_shift_gt(i8 %a) {
%shr = lshr exact i8 2, %a
%cmp = icmp ne i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_eq_shift_gt
; CHECK-NEXT : ret i1 false
define i1 @nonexact_lshr_eq_shift_gt(i8 %a) {
%shr = lshr i8 2, %a
%cmp = icmp eq i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_ne_shift_gt
; CHECK-NEXT : ret i1 true
define i1 @nonexact_lshr_ne_shift_gt(i8 %a) {
%shr = ashr i8 2, %a
%cmp = icmp ne i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq
; CHECK-NEXT: icmp eq i8 %a, 7
define i1 @exact_ashr_eq(i8 %a) {
@ -610,22 +322,6 @@ define i1 @nonexact_ashr_ne_noexactdiv(i8 %a) {
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_eq_noexactlog
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_eq_noexactlog(i8 %a) {
%shr = lshr exact i8 90, %a
%cmp = icmp eq i8 %shr, 30
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_noexactlog
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_ne_noexactlog(i8 %a) {
%shr = lshr exact i8 90, %a
%cmp = icmp ne i8 %shr, 30
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_eq_noexactlog
; CHECK-NEXT: ret i1 false
define i1 @nonexact_lshr_eq_noexactlog(i8 %a) {
@ -642,22 +338,6 @@ define i1 @nonexact_lshr_ne_noexactlog(i8 %a) {
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_noexactlog
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_eq_noexactlog(i8 %a) {
%shr = ashr exact i8 -90, %a
%cmp = icmp eq i8 %shr, -30
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_noexactlog
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_ne_noexactlog(i8 %a) {
%shr = ashr exact i8 -90, %a
%cmp = icmp ne i8 %shr, -30
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_eq_noexactlog
; CHECK-NEXT: ret i1 false
define i1 @nonexact_ashr_eq_noexactlog(i8 %a) {

10
test/Transforms/InstSimplify/ashr-nop.ll
View File

@ -1,10 +0,0 @@
; RUN: opt < %s -instsimplify -S | FileCheck %s
; CHECK-LABEL: @foo
; CHECK-NOT: ashr
define i32 @foo(i32 %x) {
%o = and i32 %x, 1
%n = add i32 %o, -1
%t = ashr i32 %n, 17
ret i32 %t
}

332
test/Transforms/InstSimplify/shr-nop.ll Normal file
View File

@ -0,0 +1,332 @@
; RUN: opt < %s -instsimplify -S | FileCheck %s
; CHECK-LABEL: @foo
; CHECK: %[[and:.*]] = and i32 %x, 1
; CHECK-NEXT: %[[add:.*]] = add i32 %[[and]], -1
; CHECK-NEXT: ret i32 %[[add]]
define i32 @foo(i32 %x) {
%o = and i32 %x, 1
%n = add i32 %o, -1
%t = ashr i32 %n, 17
ret i32 %t
}
; CHECK-LABEL: @exact_lshr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_eq_both_zero(i8 %a) {
%shr = lshr exact i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_eq_both_zero(i8 %a) {
%shr = ashr exact i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_ashr_eq_both_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_ne_both_zero(i8 %a) {
%shr = lshr exact i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_ne_both_zero(i8 %a) {
%shr = ashr exact i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_lshr_ne_both_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_ne_both_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_ashr_ne_both_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_eq_last_zero(i8 %a) {
%shr = lshr exact i8 128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_eq_last_zero(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_eq_both_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_lshr_eq_both_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_ne_last_zero(i8 %a) {
%shr = lshr exact i8 128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_ne_last_zero(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_lshr_eq_last_zero(i8 %a) {
%shr = lshr i8 128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_eq_last_zero
; CHECK-NEXT: ret i1 false
define i1 @nonexact_ashr_eq_last_zero(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp eq i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_lshr_ne_last_zero(i8 %a) {
%shr = lshr i8 128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_ne_last_zero
; CHECK-NEXT: ret i1 true
define i1 @nonexact_ashr_ne_last_zero(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp ne i8 %shr, 0
ret i1 %cmp
}
; CHECK-LABEL: @lshr_eq_first_zero
; CHECK-NEXT: ret i1 false
define i1 @lshr_eq_first_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp eq i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @ashr_eq_first_zero
; CHECK-NEXT: ret i1 false
define i1 @ashr_eq_first_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp eq i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @lshr_ne_first_zero
; CHECK-NEXT: ret i1 true
define i1 @lshr_ne_first_zero(i8 %a) {
%shr = lshr i8 0, %a
%cmp = icmp ne i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @ashr_ne_first_zero
; CHECK-NEXT: ret i1 true
define i1 @ashr_ne_first_zero(i8 %a) {
%shr = ashr i8 0, %a
%cmp = icmp ne i8 %shr, 2
ret i1 %cmp
}
; CHECK-LABEL: @ashr_eq_both_minus1
; CHECK-NEXT: ret i1 true
define i1 @ashr_eq_both_minus1(i8 %a) {
%shr = ashr i8 -1, %a
%cmp = icmp eq i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @ashr_ne_both_minus1
; CHECK-NEXT: ret i1 false
define i1 @ashr_ne_both_minus1(i8 %a) {
%shr = ashr i8 -1, %a
%cmp = icmp ne i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_both_minus1
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_eq_both_minus1(i8 %a) {
%shr = ashr exact i8 -1, %a
%cmp = icmp eq i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_both_minus1
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_ne_both_minus1(i8 %a) {
%shr = ashr exact i8 -1, %a
%cmp = icmp ne i8 %shr, -1
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_opposite_msb
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_eq_opposite_msb(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp eq i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_noexactlog
; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_eq_noexactlog(i8 %a) {
%shr = ashr exact i8 -90, %a
%cmp = icmp eq i8 %shr, -30
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_opposite_msb
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_ne_opposite_msb(i8 %a) {
%shr = ashr exact i8 -128, %a
%cmp = icmp ne i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @ashr_eq_opposite_msb
; CHECK-NEXT: ret i1 false
define i1 @ashr_eq_opposite_msb(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp eq i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @ashr_ne_opposite_msb
; CHECK-NEXT: ret i1 true
define i1 @ashr_ne_opposite_msb(i8 %a) {
%shr = ashr i8 -128, %a
%cmp = icmp ne i8 %shr, 1
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_eq_shift_gt
; CHECK-NEXT : ret i1 false
define i1 @exact_ashr_eq_shift_gt(i8 %a) {
%shr = ashr exact i8 -2, %a
%cmp = icmp eq i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_shift_gt
; CHECK-NEXT : ret i1 true
define i1 @exact_ashr_ne_shift_gt(i8 %a) {
%shr = ashr exact i8 -2, %a
%cmp = icmp ne i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_eq_shift_gt
; CHECK-NEXT : ret i1 false
define i1 @nonexact_ashr_eq_shift_gt(i8 %a) {
%shr = ashr i8 -2, %a
%cmp = icmp eq i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_ashr_ne_shift_gt
; CHECK-NEXT : ret i1 true
define i1 @nonexact_ashr_ne_shift_gt(i8 %a) {
%shr = ashr i8 -2, %a
%cmp = icmp ne i8 %shr, -8
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_eq_shift_gt
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_eq_shift_gt(i8 %a) {
%shr = lshr exact i8 2, %a
%cmp = icmp eq i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_shift_gt
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_ne_shift_gt(i8 %a) {
%shr = lshr exact i8 2, %a
%cmp = icmp ne i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_eq_shift_gt
; CHECK-NEXT : ret i1 false
define i1 @nonexact_lshr_eq_shift_gt(i8 %a) {
%shr = lshr i8 2, %a
%cmp = icmp eq i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @nonexact_lshr_ne_shift_gt
; CHECK-NEXT : ret i1 true
define i1 @nonexact_lshr_ne_shift_gt(i8 %a) {
%shr = ashr i8 2, %a
%cmp = icmp ne i8 %shr, 8
ret i1 %cmp
}
; CHECK-LABEL: @exact_ashr_ne_noexactlog
; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_ne_noexactlog(i8 %a) {
%shr = ashr exact i8 -90, %a
%cmp = icmp ne i8 %shr, -30
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_eq_noexactlog
; CHECK-NEXT: ret i1 false
define i1 @exact_lshr_eq_noexactlog(i8 %a) {
%shr = lshr exact i8 90, %a
%cmp = icmp eq i8 %shr, 30
ret i1 %cmp
}
; CHECK-LABEL: @exact_lshr_ne_noexactlog
; CHECK-NEXT: ret i1 true
define i1 @exact_lshr_ne_noexactlog(i8 %a) {
%shr = lshr exact i8 90, %a
%cmp = icmp ne i8 %shr, 30
ret i1 %cmp
}