[llvm-readobj/obj2yaml/yaml2obj] Support MIPS machine ELF header flags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236807 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Atanasyan 2015-05-08 07:04:59 +00:00
parent 7a5d9c0611
commit dfa21e1100
5 changed files with 80 additions and 18 deletions

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@ -446,6 +446,27 @@ enum : unsigned {
EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode.
EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant.
// MIPS machine variant
EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900
EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010
EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100
EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650
EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120
EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181
EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1
EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon
EF_MIPS_MACH_XLR = 0x008c0000, // RMI Xlr
EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2
EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3
EF_MIPS_MACH_5400 = 0x00910000, // NEC VR5400
EF_MIPS_MACH_5900 = 0x00920000, // MIPS R5900
EF_MIPS_MACH_5500 = 0x00980000, // NEC VR5500
EF_MIPS_MACH_9000 = 0x00990000, // Unknown
EF_MIPS_MACH_LS2E = 0x00a00000, // ST Microelectronics Loongson 2E
EF_MIPS_MACH_LS2F = 0x00a10000, // ST Microelectronics Loongson 2F
EF_MIPS_MACH_LS3A = 0x00a20000, // Loongson 3A
EF_MIPS_MACH = 0x00ff0000, // EF_MIPS_MACH_xxx selection mask
// ARCH_ASE
EF_MIPS_MICROMIPS = 0x02000000, // microMIPS
EF_MIPS_ARCH_ASE_M16 =

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@ -276,6 +276,24 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
BCaseMask(EF_MIPS_ABI_O64, EF_MIPS_ABI)
BCaseMask(EF_MIPS_ABI_EABI32, EF_MIPS_ABI)
BCaseMask(EF_MIPS_ABI_EABI64, EF_MIPS_ABI)
BCaseMask(EF_MIPS_MACH_3900, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_4010, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_4100, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_4650, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_4120, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_4111, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_SB1, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_OCTEON, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_XLR, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_OCTEON2, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_OCTEON3, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_5400, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_5900, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_5500, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_9000, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_LS2E, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_LS2F, EF_MIPS_MACH)
BCaseMask(EF_MIPS_MACH_LS3A, EF_MIPS_MACH)
BCaseMask(EF_MIPS_ARCH_1, EF_MIPS_ARCH)
BCaseMask(EF_MIPS_ARCH_2, EF_MIPS_ARCH)
BCaseMask(EF_MIPS_ARCH_3, EF_MIPS_ARCH)

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@ -2,7 +2,7 @@
# RUN: llvm-readobj -file-headers %t | FileCheck -check-prefix=OBJ %s
# RUN: obj2yaml %t | FileCheck -check-prefix=YAML %s
# OBJ: Flags [ (0x9E001727)
# OBJ: Flags [ (0x9E8B1727)
# OBJ-NEXT: EF_MIPS_32BITMODE (0x100)
# OBJ-NEXT: EF_MIPS_ABI2 (0x20)
# OBJ-NEXT: EF_MIPS_ABI_O32 (0x1000)
@ -11,6 +11,7 @@
# OBJ-NEXT: EF_MIPS_ARCH_ASE_MDMX (0x8000000)
# OBJ-NEXT: EF_MIPS_CPIC (0x4)
# OBJ-NEXT: EF_MIPS_FP64 (0x200)
# OBJ-NEXT: EF_MIPS_MACH_OCTEON (0x8B0000)
# OBJ-NEXT: EF_MIPS_MICROMIPS (0x2000000)
# OBJ-NEXT: EF_MIPS_NAN2008 (0x400)
# OBJ-NEXT: EF_MIPS_NOREORDER (0x1)
@ -22,25 +23,25 @@
# YAML-NEXT: Data: ELFDATA2LSB
# YAML-NEXT: Type: ET_REL
# YAML-NEXT: Machine: EM_MIPS
# YAML-NEXT: Flags: [ EF_MIPS_NOREORDER, EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI2, EF_MIPS_32BITMODE, EF_MIPS_FP64, EF_MIPS_NAN2008, EF_MIPS_MICROMIPS, EF_MIPS_ARCH_ASE_M16, EF_MIPS_ARCH_ASE_MDMX, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6 ]
# YAML-NEXT: Flags: [ EF_MIPS_NOREORDER, EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI2, EF_MIPS_32BITMODE, EF_MIPS_FP64, EF_MIPS_NAN2008, EF_MIPS_MICROMIPS, EF_MIPS_ARCH_ASE_M16, EF_MIPS_ARCH_ASE_MDMX, EF_MIPS_ABI_O32, EF_MIPS_MACH_OCTEON, EF_MIPS_ARCH_32R6 ]
---
FileHeader:
Class: ELFCLASS32
Data: ELFDATA2LSB
Type: ET_REL
Machine: EM_MIPS
Flags: [ EF_MIPS_NOREORDER, EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI2,
EF_MIPS_32BITMODE, EF_MIPS_FP64, EF_MIPS_NAN2008,
EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6,
EF_MIPS_MICROMIPS, EF_MIPS_ARCH_ASE_M16,
EF_MIPS_ARCH_ASE_MDMX ]
Class: ELFCLASS32
Data: ELFDATA2LSB
Type: ET_REL
Machine: EM_MIPS
Flags: [ EF_MIPS_NOREORDER, EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI2,
EF_MIPS_32BITMODE, EF_MIPS_FP64, EF_MIPS_NAN2008,
EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6,
EF_MIPS_MICROMIPS, EF_MIPS_ARCH_ASE_M16,
EF_MIPS_ARCH_ASE_MDMX, EF_MIPS_MACH_OCTEON ]
Sections:
- Name: .text
Type: SHT_PROGBITS
Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
AddressAlign: 16
Size: 4
- Name: .text
Type: SHT_PROGBITS
Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
AddressAlign: 16
Size: 4
Symbols:
Global:

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@ -523,6 +523,24 @@ static const EnumEntry<unsigned> ElfHeaderMipsFlags[] = {
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_ABI_O64),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_ABI_EABI32),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_ABI_EABI64),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_3900),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_4010),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_4100),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_4650),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_4120),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_4111),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_SB1),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_OCTEON),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_XLR),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_OCTEON2),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_OCTEON3),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_5400),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_5900),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_5500),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_9000),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_LS2E),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_LS2F),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MACH_LS3A),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_MICROMIPS),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_ARCH_ASE_M16),
LLVM_READOBJ_ENUM_ENT(ELF, EF_MIPS_ARCH_ASE_MDMX),
@ -568,7 +586,8 @@ void ELFDumper<ELFT>::printFileHeaders() {
W.printHex ("SectionHeaderOffset", Header->e_shoff);
if (Header->e_machine == EM_MIPS)
W.printFlags("Flags", Header->e_flags, makeArrayRef(ElfHeaderMipsFlags),
unsigned(ELF::EF_MIPS_ARCH), unsigned(ELF::EF_MIPS_ABI));
unsigned(ELF::EF_MIPS_ARCH), unsigned(ELF::EF_MIPS_ABI),
unsigned(ELF::EF_MIPS_MACH));
else
W.printFlags("Flags", Header->e_flags);
W.printNumber("HeaderSize", Header->e_ehsize);

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@ -98,7 +98,8 @@ public:
template <typename T, typename TFlag>
void printFlags(StringRef Label, T Value, ArrayRef<EnumEntry<TFlag>> Flags,
TFlag EnumMask1 = {}, TFlag EnumMask2 = {}) {
TFlag EnumMask1 = {}, TFlag EnumMask2 = {},
TFlag EnumMask3 = {}) {
typedef EnumEntry<TFlag> FlagEntry;
typedef SmallVector<FlagEntry, 10> FlagVector;
FlagVector SetFlags;
@ -112,6 +113,8 @@ public:
EnumMask = EnumMask1;
else if (Flag.Value & EnumMask2)
EnumMask = EnumMask2;
else if (Flag.Value & EnumMask3)
EnumMask = EnumMask3;
bool IsEnum = (Flag.Value & EnumMask) != 0;
if ((!IsEnum && (Value & Flag.Value) == Flag.Value) ||
(IsEnum && (Value & EnumMask) == Flag.Value)) {