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Add support for binary encoding of ARM 'adr' instructions referencing constant

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pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120635 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2010-12-02 00:28:45 +00:00
parent 317bafb82c
commit dff84b0325
7 changed files with 65 additions and 41 deletions
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7
lib/MC/MachObjectWriter.cpp
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@@ -31,7 +31,12 @@ using namespace llvm::object;
// FIXME: this has been copied from (or to) X86AsmBackend.cpp
static unsigned getFixupKindLog2Size(unsigned Kind) {
switch (Kind) {
default: llvm_unreachable("invalid fixup kind!");
// FIXME: Until ARM has it's own relocation stuff spun off, it comes
// through here and we don't want it to puke all over. Any reasonable
// values will only come when ARM relocation support gets added, at which
// point this will be X86 only again and the llvm_unreachable can be
// re-enabled.
default: return 0;// llvm_unreachable("invalid fixup kind!");
case FK_PCRel_1:
case FK_Data_1: return 0;
case FK_PCRel_2: