6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-15 20:29:48 +00:00
Code Issues Projects Releases Wiki Activity

Revert commit r157966

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157972 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joel Jones 2012-06-05 00:47:21 +00:00
parent dd52bf2ed8
commit e061053051
2 changed files with 0 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -62,14 +62,6 @@ def t2_so_imm_neg_XFORM : SDNodeXForm<imm, [{
return CurDAG->getTargetConstant(-((int)N->getZExtValue()), MVT::i32);
}]>;
// so_imm_not_sext_XFORM - Return a so_imm value packed into the format
// described for so_imm_not_sext def below.
def t2_so_imm_not_sext_XFORM : SDNodeXForm<imm, [{
APInt apIntN = N->getAPIntValue();
unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue();
return CurDAG->getTargetConstant(~N16bitSignExt, MVT::i32);
}]>;
// t2_so_imm - Match a 32-bit immediate operand, which is an
// 8-bit immediate rotated by an arbitrary number of bits, or an 8-bit
// immediate splatted into multiple bytes of the word.
@ -94,17 +86,6 @@ def t2_so_imm_not : Operand<i32>, PatLeaf<(imm), [{
let ParserMatchClass = t2_so_imm_not_asmoperand;
}
// t2_so_imm_not_sext - Match an immediate that when zero-extended
// from 16-bits to 32-bits is a complement of a t2_so_imm.
def t2_so_imm_not_sext : Operand<i32>, PatLeaf<(imm), [{
APInt apIntN = N->getAPIntValue();
if (!apIntN.isIntN(16)) return false;
unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue();
return ARM_AM::getT2SOImmVal(~N16bitSignExt) != -1;
}], t2_so_imm_not_sext_XFORM> {
let ParserMatchClass = t2_so_imm_not_asmoperand;
}
// t2_so_imm_neg - Match an immediate that is a negation of a t2_so_imm.
def t2_so_imm_neg_asmoperand : AsmOperandClass { let Name = "T2SOImmNeg"; }
def t2_so_imm_neg : Operand<i32>, PatLeaf<(imm), [{
@ -2351,11 +2332,6 @@ let AddedComplexity = 1 in
def : T2Pat<(and rGPR:$src, t2_so_imm_not:$imm),
(t2BICri rGPR:$src, t2_so_imm_not:$imm)>;
// so_imm_not_sext is needed instead of so_imm_not, as the value of imm
// will match the original bitWidth for $src.
def : T2Pat<(and rGPR:$src, t2_so_imm_not_sext:$imm),
(t2BICri rGPR:$src, t2_so_imm_not_sext:$imm)>;
// FIXME: Disable this pattern on Darwin to workaround an assembler bug.
def : T2Pat<(or rGPR:$src, t2_so_imm_not:$imm),
(t2ORNri rGPR:$src, t2_so_imm_not:$imm)>,

19
test/CodeGen/ARM/bicNoZext.ll
View File

@ -1,19 +0,0 @@
; RUN: llc %s -o - | FileCheck %s
; ModuleID = 'bic.c'
target triple = "thumbv7-apple-ios3.0.0"
define zeroext i16 @foo16(i16 zeroext %f) nounwind readnone optsize ssp {
entry:
; CHECK: .thumb_func _foo16
; CHECK: {{bic[^#]*#3}}
%and = and i16 %f, -4
ret i16 %and
}
define i32 @foo32(i32 %f) nounwind readnone optsize ssp {
entry:
; CHECK: .thumb_func _foo32
; CHECK: {{bic[^#]*#3}}
%and = and i32 %f, -4
ret i32 %and
}