mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
[ms-inline asm] Add support for numeric displacement expressions in bracketed
memory operands. Essentially, this layers an infix calculator on top of the parsing state machine. The scale on the index register is still expected to be an immediate __asm mov eax, [eax + ebx*4] and will not work with more complex expressions. For example, __asm mov eax, [eax + ebx*(2*2)] The plus and minus binary operators assume the numeric value of a register is zero so as to not change the displacement. Register operands should never be an operand for a multiply or divide operation; the scale*indexreg expression is always replaced with a zero on the operand stack to prevent such a case. rdar://13521380 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178881 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
parent
9463c0f3da
commit
e112453fc3
@ -676,41 +676,180 @@ static unsigned getIntelMemOperandSize(StringRef OpStr) {
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return Size;
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}
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enum InfixCalculatorTok {
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IC_PLUS = 0,
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IC_MINUS,
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IC_MULTIPLY,
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IC_DIVIDE,
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IC_RPAREN,
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IC_LPAREN,
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IC_IMM,
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IC_REGISTER
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};
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static const char OpPrecedence[] = {
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0, // IC_PLUS
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0, // IC_MINUS
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1, // IC_MULTIPLY
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1, // IC_DIVIDE
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2, // IC_RPAREN
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3, // IC_LPAREN
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0, // IC_IMM
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0 // IC_REGISTER
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};
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class InfixCalculator {
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typedef std::pair< InfixCalculatorTok, int64_t > ICToken;
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SmallVector<InfixCalculatorTok, 4> InfixOperatorStack;
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SmallVector<ICToken, 4> PostfixStack;
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public:
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int64_t popOperand() {
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assert (!PostfixStack.empty() && "Poped an empty stack!");
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ICToken Op = PostfixStack.pop_back_val();
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assert ((Op.first == IC_IMM || Op.first == IC_REGISTER)
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&& "Expected and immediate or register!");
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return Op.second;
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}
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void pushOperand(InfixCalculatorTok Op, int64_t Val = 0) {
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assert ((Op == IC_IMM || Op == IC_REGISTER) &&
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"Unexpected operand!");
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PostfixStack.push_back(std::make_pair(Op, Val));
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}
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void popOperator() { InfixOperatorStack.pop_back_val(); }
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void pushOperator(InfixCalculatorTok Op) {
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// Push the new operator if the stack is empty.
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if (InfixOperatorStack.empty()) {
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InfixOperatorStack.push_back(Op);
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return;
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}
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// Push the new operator if it has a higher precedence than the operator on
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// the top of the stack or the operator on the top of the stack is a left
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// parentheses.
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unsigned Idx = InfixOperatorStack.size() - 1;
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InfixCalculatorTok StackOp = InfixOperatorStack[Idx];
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if (OpPrecedence[Op] > OpPrecedence[StackOp] || StackOp == IC_LPAREN) {
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InfixOperatorStack.push_back(Op);
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return;
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}
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// The operator on the top of the stack has higher precedence than the
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// new operator.
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unsigned ParenCount = 0;
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while (1) {
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// Nothing to process.
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if (InfixOperatorStack.empty())
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break;
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Idx = InfixOperatorStack.size() - 1;
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StackOp = InfixOperatorStack[Idx];
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if (!(OpPrecedence[StackOp] >= OpPrecedence[Op] || ParenCount))
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break;
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// If we have an even parentheses count and we see a left parentheses,
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// then stop processing.
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if (!ParenCount && StackOp == IC_LPAREN)
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break;
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if (StackOp == IC_RPAREN) {
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++ParenCount;
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InfixOperatorStack.pop_back_val();
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} else if (StackOp == IC_LPAREN) {
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--ParenCount;
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InfixOperatorStack.pop_back_val();
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} else {
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InfixOperatorStack.pop_back_val();
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PostfixStack.push_back(std::make_pair(StackOp, 0));
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}
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}
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// Push the new operator.
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InfixOperatorStack.push_back(Op);
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}
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int64_t execute() {
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// Push any remaining operators onto the postfix stack.
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while (!InfixOperatorStack.empty()) {
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InfixCalculatorTok StackOp = InfixOperatorStack.pop_back_val();
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if (StackOp != IC_LPAREN && StackOp != IC_RPAREN)
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PostfixStack.push_back(std::make_pair(StackOp, 0));
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}
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if (PostfixStack.empty())
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return 0;
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SmallVector<ICToken, 16> OperandStack;
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for (unsigned i = 0, e = PostfixStack.size(); i != e; ++i) {
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ICToken Op = PostfixStack[i];
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if (Op.first == IC_IMM || Op.first == IC_REGISTER) {
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OperandStack.push_back(Op);
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} else {
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assert (OperandStack.size() > 1 && "Too few operands.");
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int64_t Val;
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ICToken Op2 = OperandStack.pop_back_val();
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ICToken Op1 = OperandStack.pop_back_val();
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switch (Op.first) {
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default:
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report_fatal_error("Unexpected operator!");
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break;
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case IC_PLUS:
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Val = Op1.second + Op2.second;
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OperandStack.push_back(std::make_pair(IC_IMM, Val));
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break;
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case IC_MINUS:
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Val = Op1.second - Op2.second;
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OperandStack.push_back(std::make_pair(IC_IMM, Val));
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break;
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case IC_MULTIPLY:
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assert (Op1.first == IC_IMM && Op2.first == IC_IMM &&
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"Multiply operation with an immediate and a register!");
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Val = Op1.second * Op2.second;
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OperandStack.push_back(std::make_pair(IC_IMM, Val));
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break;
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case IC_DIVIDE:
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assert (Op1.first == IC_IMM && Op2.first == IC_IMM &&
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"Divide operation with an immediate and a register!");
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assert (Op2.second != 0 && "Division by zero!");
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Val = Op1.second / Op2.second;
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OperandStack.push_back(std::make_pair(IC_IMM, Val));
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break;
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}
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}
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}
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assert (OperandStack.size() == 1 && "Expected a single result.");
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return OperandStack.pop_back_val().second;
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}
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};
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enum IntelBracExprState {
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IBES_START,
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IBES_PLUS,
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IBES_MINUS,
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IBES_MULTIPLY,
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IBES_DIVIDE,
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IBES_LBRAC,
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IBES_RBRAC,
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IBES_LPAREN,
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IBES_RPAREN,
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IBES_REGISTER,
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IBES_REGISTER_STAR,
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IBES_REGISTER_STAR_INTEGER,
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IBES_INTEGER,
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IBES_INTEGER_STAR,
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IBES_INDEX_REGISTER,
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IBES_IDENTIFIER,
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IBES_DISP_EXPR,
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IBES_MINUS,
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IBES_ERROR
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};
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class IntelBracExprStateMachine {
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IntelBracExprState State;
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unsigned BaseReg, IndexReg, Scale;
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unsigned BaseReg, IndexReg, TmpReg, Scale;
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int64_t Disp;
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unsigned TmpReg;
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int64_t TmpInteger;
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bool isPlus;
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InfixCalculator IC;
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public:
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IntelBracExprStateMachine(MCAsmParser &parser, int64_t disp) :
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State(IBES_START), BaseReg(0), IndexReg(0), Scale(1), Disp(disp),
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TmpReg(0), TmpInteger(0), isPlus(true) {}
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State(IBES_PLUS), BaseReg(0), IndexReg(0), TmpReg(0), Scale(1), Disp(disp){}
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unsigned getBaseReg() { return BaseReg; }
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unsigned getIndexReg() { return IndexReg; }
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unsigned getScale() { return Scale; }
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int64_t getDisp() { return Disp; }
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int64_t getDisp() { return Disp + IC.execute(); }
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bool isValidEndState() { return State == IBES_RBRAC; }
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void onPlus() {
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@ -719,14 +858,12 @@ public:
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State = IBES_ERROR;
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break;
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case IBES_INTEGER:
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State = IBES_START;
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if (isPlus)
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Disp += TmpInteger;
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else
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Disp -= TmpInteger;
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case IBES_RPAREN:
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State = IBES_PLUS;
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IC.pushOperator(IC_PLUS);
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break;
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case IBES_REGISTER:
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State = IBES_START;
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State = IBES_PLUS;
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// If we already have a BaseReg, then assume this is the IndexReg with a
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// scale of 1.
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if (!BaseReg) {
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@ -736,30 +873,25 @@ public:
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IndexReg = TmpReg;
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Scale = 1;
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}
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break;
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case IBES_INDEX_REGISTER:
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State = IBES_START;
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IC.pushOperator(IC_PLUS);
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break;
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}
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isPlus = true;
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}
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void onMinus() {
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switch (State) {
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default:
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State = IBES_ERROR;
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break;
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case IBES_START:
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State = IBES_MINUS;
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break;
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case IBES_PLUS:
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case IBES_LPAREN:
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IC.pushOperand(IC_IMM);
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case IBES_INTEGER:
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State = IBES_START;
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if (isPlus)
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Disp += TmpInteger;
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else
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Disp -= TmpInteger;
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case IBES_RPAREN:
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State = IBES_MINUS;
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IC.pushOperator(IC_MINUS);
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break;
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case IBES_REGISTER:
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State = IBES_START;
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State = IBES_MINUS;
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// If we already have a BaseReg, then assume this is the IndexReg with a
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// scale of 1.
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if (!BaseReg) {
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@ -769,27 +901,28 @@ public:
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IndexReg = TmpReg;
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Scale = 1;
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}
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break;
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case IBES_INDEX_REGISTER:
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State = IBES_START;
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IC.pushOperator(IC_MINUS);
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break;
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}
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isPlus = false;
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}
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void onRegister(unsigned Reg) {
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switch (State) {
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default:
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State = IBES_ERROR;
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break;
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case IBES_START:
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case IBES_PLUS:
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case IBES_LPAREN:
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State = IBES_REGISTER;
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TmpReg = Reg;
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IC.pushOperand(IC_REGISTER);
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break;
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case IBES_INTEGER_STAR:
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assert (!IndexReg && "IndexReg already set!");
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State = IBES_INDEX_REGISTER;
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State = IBES_INTEGER;
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IndexReg = Reg;
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Scale = TmpInteger;
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Scale = IC.popOperand();
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IC.pushOperand(IC_IMM);
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IC.popOperator();
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break;
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}
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}
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@ -798,8 +931,10 @@ public:
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default:
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State = IBES_ERROR;
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break;
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case IBES_START:
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State = IBES_DISP_EXPR;
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case IBES_PLUS:
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case IBES_MINUS:
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State = IBES_INTEGER;
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IC.pushOperand(IC_IMM);
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break;
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}
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}
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@ -808,19 +943,21 @@ public:
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default:
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State = IBES_ERROR;
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break;
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case IBES_START:
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State = IBES_INTEGER;
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TmpInteger = TmpInt;
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break;
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case IBES_PLUS:
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case IBES_MINUS:
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case IBES_MULTIPLY:
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case IBES_DIVIDE:
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case IBES_LPAREN:
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case IBES_INTEGER_STAR:
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State = IBES_INTEGER;
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TmpInteger = TmpInt;
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IC.pushOperand(IC_IMM, TmpInt);
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break;
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case IBES_REGISTER_STAR:
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assert (!IndexReg && "IndexReg already set!");
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State = IBES_INDEX_REGISTER;
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State = IBES_INTEGER;
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IndexReg = TmpReg;
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Scale = TmpInt;
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IC.popOperator();
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break;
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}
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}
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@ -831,9 +968,26 @@ public:
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break;
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case IBES_INTEGER:
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State = IBES_INTEGER_STAR;
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IC.pushOperator(IC_MULTIPLY);
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break;
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case IBES_REGISTER:
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State = IBES_REGISTER_STAR;
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IC.pushOperator(IC_MULTIPLY);
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break;
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case IBES_RPAREN:
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State = IBES_MULTIPLY;
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IC.pushOperator(IC_MULTIPLY);
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break;
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}
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}
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void onDivide() {
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switch (State) {
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default:
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State = IBES_ERROR;
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break;
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case IBES_INTEGER:
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State = IBES_DIVIDE;
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IC.pushOperator(IC_DIVIDE);
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break;
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}
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}
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@ -843,8 +997,8 @@ public:
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State = IBES_ERROR;
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break;
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case IBES_RBRAC:
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State = IBES_START;
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isPlus = true;
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State = IBES_PLUS;
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IC.pushOperator(IC_PLUS);
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break;
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}
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}
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@ -853,15 +1007,9 @@ public:
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default:
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State = IBES_ERROR;
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break;
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case IBES_DISP_EXPR:
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State = IBES_RBRAC;
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break;
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case IBES_RPAREN:
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case IBES_INTEGER:
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State = IBES_RBRAC;
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if (isPlus)
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Disp += TmpInteger;
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else
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Disp -= TmpInteger;
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break;
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case IBES_REGISTER:
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State = IBES_RBRAC;
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@ -875,8 +1023,38 @@ public:
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Scale = 1;
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}
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break;
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case IBES_INDEX_REGISTER:
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State = IBES_RBRAC;
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}
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}
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void onLParen() {
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switch (State) {
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default:
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State = IBES_ERROR;
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break;
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case IBES_PLUS:
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case IBES_MINUS:
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case IBES_MULTIPLY:
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case IBES_DIVIDE:
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case IBES_INTEGER_STAR:
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case IBES_LPAREN:
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State = IBES_LPAREN;
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IC.pushOperator(IC_LPAREN);
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break;
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}
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}
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void onRParen() {
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switch (State) {
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default:
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State = IBES_ERROR;
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break;
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case IBES_REGISTER:
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case IBES_INTEGER:
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case IBES_PLUS:
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case IBES_MINUS:
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case IBES_MULTIPLY:
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case IBES_DIVIDE:
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case IBES_RPAREN:
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State = IBES_RPAREN;
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IC.pushOperator(IC_RPAREN);
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break;
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}
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}
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@ -1005,16 +1183,20 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
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}
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return ErrorOperand(Tok.getLoc(), "Unexpected identifier!");
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}
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case AsmToken::Integer: {
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int64_t Val = Tok.getIntVal();
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SM.onInteger(Val);
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case AsmToken::Integer:
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if (isParsingInlineAsm())
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_ImmPrefix,
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Tok.getLoc()));
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SM.onInteger(Tok.getIntVal());
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break;
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}
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case AsmToken::Plus: SM.onPlus(); break;
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case AsmToken::Minus: SM.onMinus(); break;
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case AsmToken::Star: SM.onStar(); break;
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case AsmToken::Slash: SM.onDivide(); break;
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case AsmToken::LBrac: SM.onLBrac(); break;
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case AsmToken::RBrac: SM.onRBrac(); break;
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case AsmToken::LParen: SM.onLParen(); break;
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case AsmToken::RParen: SM.onRParen(); break;
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}
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if (!Done && UpdateLocLex) {
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End = Tok.getLoc();
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@ -247,4 +247,41 @@ _main:
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mov [16][eax][ebx*4], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][ebx*4 - 16], ecx
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ret
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// CHECK: prefetchnta 12800(%esi)
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prefetchnta [esi + (200*64)]
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// CHECK: prefetchnta 32(%esi)
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prefetchnta [esi + (64/2)]
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// CHECK: prefetchnta 128(%esi)
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prefetchnta [esi + (64/2*4)]
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// CHECK: prefetchnta 8(%esi)
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prefetchnta [esi + (64/(2*4))]
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// CHECK: prefetchnta 48(%esi)
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prefetchnta [esi + (64/(2*4)+40)]
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][ebx*4 - 2*8], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][4*ebx - 2*8], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax + 4*ebx - 2*8], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [12 + eax + (4*ebx) - 2*14], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [eax][ebx*4 - 2*2*2*2], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [eax][ebx*4 - (2*8)], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [eax][ebx*4 - 2 * 8 + 4 - 4], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [eax + ebx*4 - 2 * 8 + 4 - 4], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [eax + ebx*4 - 2 * ((8 + 4) - 4)], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [-2 * ((8 + 4) - 4) + eax + ebx*4], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [((-2) * ((8 + 4) - 4)) + eax + ebx*4], ecx
|
||||
// CHECK: movl %ecx, -16(%eax,%ebx,4)
|
||||
mov [eax + ((-2) * ((8 + 4) - 4)) + ebx*4], ecx
|
||||
|
||||
ret
|
||||
|
||||
Loading…
Reference in New Issue
Block a user