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ARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155392 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2934,6 +2934,7 @@ class N2VNSh<bit op24, bit op23, bits<4> op11_8, bit op7, bit op6, bit op4,
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// Shift right by immediate and accumulate,
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// both double- and quad-register.
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let TwoOperandAliasConstraint = "$Vm = $Vd" in {
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class N2VDShAdd<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4,
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Operand ImmTy, string OpcodeStr, string Dt,
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ValueType Ty, SDNode ShOp>
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@ -2950,9 +2951,11 @@ class N2VQShAdd<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4,
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OpcodeStr, Dt, "$Vd, $Vm, $SIMM", "$src1 = $Vd",
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[(set QPR:$Vd, (Ty (add QPR:$src1,
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(Ty (ShOp QPR:$Vm, (i32 imm:$SIMM))))))]>;
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}
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// Shift by immediate and insert,
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// both double- and quad-register.
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let TwoOperandAliasConstraint = "$Vm = $Vd" in {
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class N2VDShIns<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4,
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Operand ImmTy, Format f, string OpcodeStr, string Dt,
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ValueType Ty,SDNode ShOp>
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@ -2967,6 +2970,7 @@ class N2VQShIns<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4,
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(ins QPR:$src1, QPR:$Vm, ImmTy:$SIMM), f, IIC_VSHLiQ,
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OpcodeStr, Dt, "$Vd, $Vm, $SIMM", "$src1 = $Vd",
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[(set QPR:$Vd, (Ty (ShOp QPR:$src1, QPR:$Vm, (i32 imm:$SIMM))))]>;
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}
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// Convert, with fractional bits immediate,
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// both double- and quad-register.
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@ -6562,64 +6566,6 @@ def : NEONInstAlias<"vclt${p}.u32 $Qd, $Qn, $Qm",
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def : NEONInstAlias<"vclt${p}.f32 $Qd, $Qn, $Qm",
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(VCGTfq QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p)>;
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// Two-operand variants for VSRA.
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// Signed.
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def : NEONInstAlias<"vsra${p}.s8 $Vdm, $imm",
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(VSRAsv8i8 DPR:$Vdm, DPR:$Vdm, shr_imm8:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.s16 $Vdm, $imm",
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(VSRAsv4i16 DPR:$Vdm, DPR:$Vdm, shr_imm16:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.s32 $Vdm, $imm",
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(VSRAsv2i32 DPR:$Vdm, DPR:$Vdm, shr_imm32:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.s64 $Vdm, $imm",
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(VSRAsv1i64 DPR:$Vdm, DPR:$Vdm, shr_imm64:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.s8 $Vdm, $imm",
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(VSRAsv16i8 QPR:$Vdm, QPR:$Vdm, shr_imm8:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.s16 $Vdm, $imm",
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(VSRAsv8i16 QPR:$Vdm, QPR:$Vdm, shr_imm16:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.s32 $Vdm, $imm",
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(VSRAsv4i32 QPR:$Vdm, QPR:$Vdm, shr_imm32:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.s64 $Vdm, $imm",
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(VSRAsv2i64 QPR:$Vdm, QPR:$Vdm, shr_imm64:$imm, pred:$p)>;
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// Unsigned.
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def : NEONInstAlias<"vsra${p}.u8 $Vdm, $imm",
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(VSRAuv8i8 DPR:$Vdm, DPR:$Vdm, shr_imm8:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.u16 $Vdm, $imm",
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(VSRAuv4i16 DPR:$Vdm, DPR:$Vdm, shr_imm16:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.u32 $Vdm, $imm",
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(VSRAuv2i32 DPR:$Vdm, DPR:$Vdm, shr_imm32:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.u64 $Vdm, $imm",
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(VSRAuv1i64 DPR:$Vdm, DPR:$Vdm, shr_imm64:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.u8 $Vdm, $imm",
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(VSRAuv16i8 QPR:$Vdm, QPR:$Vdm, shr_imm8:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.u16 $Vdm, $imm",
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(VSRAuv8i16 QPR:$Vdm, QPR:$Vdm, shr_imm16:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.u32 $Vdm, $imm",
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(VSRAuv4i32 QPR:$Vdm, QPR:$Vdm, shr_imm32:$imm, pred:$p)>;
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def : NEONInstAlias<"vsra${p}.u64 $Vdm, $imm",
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(VSRAuv2i64 QPR:$Vdm, QPR:$Vdm, shr_imm64:$imm, pred:$p)>;
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// Two-operand variants for VSRI.
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def : NEONInstAlias<"vsri${p}.8 $Vdm, $imm",
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(VSRIv8i8 DPR:$Vdm, DPR:$Vdm, shr_imm8:$imm, pred:$p)>;
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def : NEONInstAlias<"vsri${p}.16 $Vdm, $imm",
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(VSRIv4i16 DPR:$Vdm, DPR:$Vdm, shr_imm16:$imm, pred:$p)>;
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def : NEONInstAlias<"vsri${p}.32 $Vdm, $imm",
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(VSRIv2i32 DPR:$Vdm, DPR:$Vdm, shr_imm32:$imm, pred:$p)>;
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def : NEONInstAlias<"vsri${p}.64 $Vdm, $imm",
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(VSRIv1i64 DPR:$Vdm, DPR:$Vdm, shr_imm64:$imm, pred:$p)>;
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def : NEONInstAlias<"vsri${p}.8 $Vdm, $imm",
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(VSRIv16i8 QPR:$Vdm, QPR:$Vdm, shr_imm8:$imm, pred:$p)>;
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def : NEONInstAlias<"vsri${p}.16 $Vdm, $imm",
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(VSRIv8i16 QPR:$Vdm, QPR:$Vdm, shr_imm16:$imm, pred:$p)>;
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def : NEONInstAlias<"vsri${p}.32 $Vdm, $imm",
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(VSRIv4i32 QPR:$Vdm, QPR:$Vdm, shr_imm32:$imm, pred:$p)>;
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def : NEONInstAlias<"vsri${p}.64 $Vdm, $imm",
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(VSRIv2i64 QPR:$Vdm, QPR:$Vdm, shr_imm64:$imm, pred:$p)>;
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// Two-operand variants for VSLI.
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def : NEONInstAlias<"vsli${p}.8 $Vdm, $imm",
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(VSLIv8i8 DPR:$Vdm, DPR:$Vdm, shr_imm8:$imm, pred:$p)>;
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