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Second pass at addressing PR15351 by explicitly checking for AVX support

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when getting the host processor information.  It emits a .byte sequence on GNUC compilers to work around lack of xgetbv support with older assemblers, and resolves a comment typo found in the previous patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178636 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Aaron Ballman 2013-04-03 12:25:06 +00:00
parent e79c17856e
commit e1ecc5b0db
1 changed files with 25 additions and 2 deletions
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27
lib/Support/Host.cpp
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@ -112,6 +112,21 @@ static bool GetX86CpuIDAndInfo(unsigned value, unsigned *rEAX,
#endif
}
static bool OSHasAVXSupport() {
#if defined( __GNUC__ )
// Check xgetbv; this uses a .byte sequence instead of the instruction
// directly because older assemblers do not include support for xgetbv and
// there is no easy way to conditionally compile based on the assembler used.
int rEAX, rEDX;
__asm__ (".byte 0x0f, 0x01, 0xd0" : "=a" (rEAX), "=d" (rEDX) : "c" (0));
#elif defined(_MSC_VER)
unsigned long long rEAX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
#else
int rEAX = 0; // Ensures we return false
#endif
return (rEAX & 6) == 6;
}
static void DetectX86FamilyModel(unsigned EAX, unsigned &Family,
unsigned &Model) {
Family = (EAX >> 8) & 0xf; // Bits 8 - 11
@ -134,6 +149,10 @@ std::string sys::getHostCPUName() {
DetectX86FamilyModel(EAX, Family, Model);
bool HasSSE3 = (ECX & 0x1);
// If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV
// indicates that the AVX registers will be saved and restored on context
// switch, then we have full AVX support.
bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 && OSHasAVXSupport();
GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
bool Em64T = (EDX >> 29) & 0x1;
@ -243,11 +262,15 @@ std::string sys::getHostCPUName() {
case 42: // Intel Core i7 processor. All processors are manufactured
// using the 32 nm process.
case 45:
return "corei7-avx";
// Not all Sandy Bridge processors support AVX (such as the Pentium
// versions instead of the i7 versions).
return HasAVX ? "corei7-avx" : "corei7";
// Ivy Bridge:
case 58:
return "core-avx-i";
// Not all Ivy Bridge processors support AVX (such as the Pentium
// versions instead of the i7 versions).
return HasAVX ? "core-avx-i" : "corei7";
case 28: // Most 45 nm Intel Atom processors
case 38: // 45 nm Atom Lincroft