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[ELFYAML] Group ELF header falgs to target specific blocks. Handle flags
which are corresponding to the current target read from the ELF file. This fix cannot be tested until obj2yaml does not support ELF format. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207905 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -243,43 +243,52 @@ void ScalarEnumerationTraits<ELFYAML::ELF_ELFOSABI>::enumeration(
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void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
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ELFYAML::ELF_EF &Value) {
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const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
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assert(Object && "The IO context is not initialized");
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#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
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BCase(EF_ARM_SOFT_FLOAT)
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BCase(EF_ARM_VFP_FLOAT)
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BCase(EF_ARM_EABI_UNKNOWN)
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BCase(EF_ARM_EABI_VER1)
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BCase(EF_ARM_EABI_VER2)
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BCase(EF_ARM_EABI_VER3)
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BCase(EF_ARM_EABI_VER4)
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BCase(EF_ARM_EABI_VER5)
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BCase(EF_ARM_EABIMASK)
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BCase(EF_MIPS_NOREORDER)
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BCase(EF_MIPS_PIC)
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BCase(EF_MIPS_CPIC)
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BCase(EF_MIPS_ABI2)
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BCase(EF_MIPS_32BITMODE)
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BCase(EF_MIPS_ABI_O32)
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BCase(EF_MIPS_MICROMIPS)
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BCase(EF_MIPS_ARCH_ASE_M16)
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BCase(EF_MIPS_ARCH_1)
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BCase(EF_MIPS_ARCH_2)
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BCase(EF_MIPS_ARCH_3)
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BCase(EF_MIPS_ARCH_4)
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BCase(EF_MIPS_ARCH_5)
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BCase(EF_MIPS_ARCH_32)
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BCase(EF_MIPS_ARCH_64)
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BCase(EF_MIPS_ARCH_32R2)
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BCase(EF_MIPS_ARCH_64R2)
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BCase(EF_MIPS_ARCH)
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BCase(EF_HEXAGON_MACH_V2)
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BCase(EF_HEXAGON_MACH_V3)
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BCase(EF_HEXAGON_MACH_V4)
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BCase(EF_HEXAGON_MACH_V5)
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BCase(EF_HEXAGON_ISA_MACH)
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BCase(EF_HEXAGON_ISA_V2)
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BCase(EF_HEXAGON_ISA_V3)
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BCase(EF_HEXAGON_ISA_V4)
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BCase(EF_HEXAGON_ISA_V5)
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switch (Object->Header.Machine) {
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case ELF::EM_ARM:
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BCase(EF_ARM_SOFT_FLOAT)
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BCase(EF_ARM_VFP_FLOAT)
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BCase(EF_ARM_EABI_UNKNOWN)
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BCase(EF_ARM_EABI_VER1)
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BCase(EF_ARM_EABI_VER2)
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BCase(EF_ARM_EABI_VER3)
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BCase(EF_ARM_EABI_VER4)
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BCase(EF_ARM_EABI_VER5)
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break;
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case ELF::EM_MIPS:
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BCase(EF_MIPS_NOREORDER)
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BCase(EF_MIPS_PIC)
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BCase(EF_MIPS_CPIC)
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BCase(EF_MIPS_ABI2)
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BCase(EF_MIPS_32BITMODE)
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BCase(EF_MIPS_ABI_O32)
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BCase(EF_MIPS_MICROMIPS)
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BCase(EF_MIPS_ARCH_ASE_M16)
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BCase(EF_MIPS_ARCH_1)
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BCase(EF_MIPS_ARCH_2)
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BCase(EF_MIPS_ARCH_3)
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BCase(EF_MIPS_ARCH_4)
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BCase(EF_MIPS_ARCH_5)
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BCase(EF_MIPS_ARCH_32)
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BCase(EF_MIPS_ARCH_64)
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BCase(EF_MIPS_ARCH_32R2)
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BCase(EF_MIPS_ARCH_64R2)
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break;
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case ELF::EM_HEXAGON:
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BCase(EF_HEXAGON_MACH_V2)
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BCase(EF_HEXAGON_MACH_V3)
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BCase(EF_HEXAGON_MACH_V4)
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BCase(EF_HEXAGON_MACH_V5)
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BCase(EF_HEXAGON_ISA_V2)
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BCase(EF_HEXAGON_ISA_V3)
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BCase(EF_HEXAGON_ISA_V4)
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BCase(EF_HEXAGON_ISA_V5)
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break;
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default:
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llvm_unreachable("Unsupported architecture");
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}
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#undef BCase
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}
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