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ARM64: format register strings without creating a local Twine.

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It was causing horrible failures on some build-bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205105 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-03-29 15:35:57 +00:00
parent a68f166d60
commit e2c0b61c4f
1 changed files with 5 additions and 5 deletions
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10
lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
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@ -16,6 +16,7 @@
#include "MCTargetDesc/ARM64AddressingModes.h"
#include "MCTargetDesc/ARM64BaseInfo.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCRegisterInfo.h"
@ -1329,14 +1330,13 @@ void ARM64InstPrinter::printImplicitlyTypedVectorList(const MCInst *MI,
template <unsigned NumLanes, char LaneKind>
void ARM64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
Twine Suffix;
std::string Suffix(".");
if (NumLanes)
Suffix = Twine('.') + Twine(NumLanes) + Twine(LaneKind);
Suffix += itostr(NumLanes) + LaneKind;
else
Suffix = Twine('.') + Twine(LaneKind);
Suffix += LaneKind;
SmallString<8> Buf;
printVectorList(MI, OpNum, O, Suffix.toStringRef(Buf));
printVectorList(MI, OpNum, O, Suffix);
}
void ARM64InstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,