6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-28 06:58:19 +00:00
Code Issues Projects Releases Wiki Activity

use high-level functions in CCState

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34739 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-02-28 07:09:55 +00:00
parent 66baf26fe0
commit e32bbf61c0
1 changed files with 6 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
lib/Target/X86/X86ISelLowering.cpp
View File

@ -438,15 +438,8 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) {
SmallVector<CCValAssign, 16> RVLocs;
unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv();
CCState CCInfo(CC, getTargetMachine(), RVLocs);
CCInfo.AnalyzeReturn(Op.Val, RetCC_X86);
// Determine which register each value should be copied into.
for (unsigned i = 0; i != Op.getNumOperands() / 2; ++i) {
MVT::ValueType VT = Op.getOperand(i*2+1).getValueType();
if (RetCC_X86(i, VT, VT, CCValAssign::Full,
cast<ConstantSDNode>(Op.getOperand(i*2+2))->getValue(),
CCInfo))
assert(0 && "Unhandled result type!");
}
// If this is the first return lowered for this function, add the regs to the
// liveout set for the function.
@ -521,16 +514,14 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) {
SDNode *X86TargetLowering::
LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode *TheCall,
unsigned CallingConv, SelectionDAG &DAG) {
SmallVector<SDOperand, 8> ResultVals;
// Assign locations to each value returned by this call.
SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CallingConv, getTargetMachine(), RVLocs);
CCInfo.AnalyzeCallResult(TheCall, RetCC_X86);
for (unsigned i = 0, e = TheCall->getNumValues() - 1; i != e; ++i) {
MVT::ValueType VT = TheCall->getValueType(i);
if (RetCC_X86(i, VT, VT, CCValAssign::Full, 0, CCInfo))
assert(0 && "Unhandled result type!");
}
SmallVector<SDOperand, 8> ResultVals;
// Copy all of the result registers out of their specified physreg.
if (RVLocs.size() != 1 || RVLocs[0].getLocReg() != X86::ST0) {