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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-19 04:31:17 +00:00
fix some warnings in release-asserts mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67738 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -182,8 +182,7 @@ copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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void MipsInstrInfo::
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storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned SrcReg, bool isKill, int FI,
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const TargetRegisterClass *RC) const
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{
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const TargetRegisterClass *RC) const {
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unsigned Opc;
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DebugLoc DL = DebugLoc::getUnknownLoc();
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@ -193,11 +192,11 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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Opc = Mips::SW;
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else if (RC == Mips::FGR32RegisterClass)
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Opc = Mips::SWC1;
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else if (RC == Mips::AFGR64RegisterClass)
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else {
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assert(RC == Mips::AFGR64RegisterClass);
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Opc = Mips::SDC1;
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else
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assert(0 && "Can't store this register to stack slot");
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}
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BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, false, false, isKill)
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.addImm(0).addFrameIndex(FI);
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}
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@ -211,11 +210,11 @@ void MipsInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
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Opc = Mips::SW;
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else if (RC == Mips::FGR32RegisterClass)
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Opc = Mips::SWC1;
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else if (RC == Mips::AFGR64RegisterClass)
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else {
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assert(RC == Mips::AFGR64RegisterClass);
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Opc = Mips::SDC1;
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else
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assert(0 && "Can't store this register");
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}
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DebugLoc DL = DebugLoc::getUnknownLoc();
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MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
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.addReg(SrcReg, false, false, isKill);
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@ -235,11 +234,11 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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Opc = Mips::LW;
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else if (RC == Mips::FGR32RegisterClass)
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Opc = Mips::LWC1;
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else if (RC == Mips::AFGR64RegisterClass)
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else {
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assert(RC == Mips::AFGR64RegisterClass);
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Opc = Mips::LDC1;
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else
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assert(0 && "Can't load this register from stack slot");
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}
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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BuildMI(MBB, I, DL, get(Opc), DestReg).addImm(0).addFrameIndex(FI);
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@ -254,10 +253,10 @@ void MipsInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
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Opc = Mips::LW;
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else if (RC == Mips::FGR32RegisterClass)
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Opc = Mips::LWC1;
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else if (RC == Mips::AFGR64RegisterClass)
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else {
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assert(RC == Mips::AFGR64RegisterClass);
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Opc = Mips::LDC1;
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else
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assert(0 && "Can't load this register");
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}
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DebugLoc DL = DebugLoc::getUnknownLoc();
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MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
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@ -307,10 +306,10 @@ foldMemoryOperandImpl(MachineFunction &MF,
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if (RC == Mips::FGR32RegisterClass) {
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LoadOpc = Mips::LWC1; StoreOpc = Mips::SWC1;
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} else if (RC == Mips::AFGR64RegisterClass) {
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} else {
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assert(RC == Mips::AFGR64RegisterClass);
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LoadOpc = Mips::LDC1; StoreOpc = Mips::SDC1;
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} else
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assert(0 && "foldMemoryOperandImpl register unknown");
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}
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if (Ops[0] == 0) { // COPY -> STORE
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unsigned SrcReg = MI->getOperand(1).getReg();
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