Widen ELFYAML relocation type to 32 bits

The current 8 bits is sufficient for ELF32 targets but ELF64 requires
32 bits. Add a test for AArch64 that exposes the issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222898 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Will Newton 2014-11-27 17:20:48 +00:00
parent 8f9f6a612a
commit e40dbd6233
2 changed files with 10 additions and 2 deletions

View File

@ -40,7 +40,7 @@ LLVM_YAML_STRONG_TYPEDEF(uint8_t, ELF_ELFOSABI)
// Just use 64, since it can hold 32-bit values too.
LLVM_YAML_STRONG_TYPEDEF(uint64_t, ELF_EF)
LLVM_YAML_STRONG_TYPEDEF(uint32_t, ELF_SHT)
LLVM_YAML_STRONG_TYPEDEF(uint8_t, ELF_REL)
LLVM_YAML_STRONG_TYPEDEF(uint32_t, ELF_REL)
// Just use 64, since it can hold 32-bit values too.
LLVM_YAML_STRONG_TYPEDEF(uint64_t, ELF_SHF)
LLVM_YAML_STRONG_TYPEDEF(uint8_t, ELF_STT)

View File

@ -11,6 +11,10 @@
# CHECK-NEXT: Symbol: main
# CHECK-NEXT: Type: R_AARCH64_ABS64
# CHECK-NEXT: Addend: 0
# CHECK-NEXT: - Offset: 0x0000000000000008
# CHECK-NEXT: Symbol: main
# CHECK-NEXT: Type: R_AARCH64_TLSGD_ADR_PREL21
# CHECK-NEXT: Addend: 0
FileHeader:
Class: ELFCLASS64
@ -22,7 +26,7 @@ Sections:
Name: .text
Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
AddressAlign: 0x04
Content: 0000000000000000
Content: 00000000000000000000000000000000
- Type: SHT_RELA
Name: .rela.text
Link: .symtab
@ -33,6 +37,10 @@ Sections:
Symbol: main
Type: R_AARCH64_ABS64
Addend: 0
- Offset: 8
Symbol: main
Type: R_AARCH64_TLSGD_ADR_PREL21
Addend: 0
Symbols:
Local: