Checkin tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10187 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2003-11-23 18:12:22 +00:00
parent 7610029346
commit e44f1db6e6
55 changed files with 464 additions and 0 deletions

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##===- projects/sample/Makefile ----------------------------*- Makefile -*-===##
#
# This is a sample Makefile for a project that uses LLVM.
#
##===----------------------------------------------------------------------===##
#
# Indicates our relative path to the top of the project's root directory.
#
LEVEL = ../../..
#
# Directories that needs to be built.
#
DIRS =
#
# Include the Master Makefile that knows how to build all.
#
include $(LEVEL)/Makefile.common
LOGIC_TESTS = eq ne le ge gt lt false true
BITWISE_TESTS = shl shr xor or and
ARITHMETIC_TESTS = abs neg add sub mul div mod star_slash incr decr min max
STACK_TESTS = drop drop2 nip nip2 dup dup2 swap swap2 over over2 rot rot2 \
rrot rrot2 tuck tuck2 roll pick select
MEMORY_TESTS = memory
CONTROL_TESTS = while return
IO_TESTS = space tab out_chr out_num out_str
TESTS = $(LOGIC_TESTS) $(ARITHMETIC_TESTS) $(BITWISE_TESTS) $(STACK_TESTS) \
$(MEMORY_TESTS) $(CONTROL_TESTS) $(IO_TESTS)
all :: test_each
test_each: $(TESTS)
$(BUILD_SRC_DIR)/runtests $(BUILD_OBJ_DIR) $(TESTS)
% : %.s testing.s
gcc -ggdb -L$(BUILD_OBJ_ROOT)/lib/Debug testing.s -lstkr_runtime -o $* $*.s
%.s : %.bc
llc -f -o $*.s $<
ifdef OPTIMIZE
%.bc : %.st $(BUILD_OBJ_ROOT)/tools/Debug/stkrc
stkrc -e -o - $< | opt -stats -q -f -o $*.bc -adce -branch-combine -cee -constmerge -constprop -dce -die -gcse -globaldce -instcombine -pre
else
%.bc : %.st $(BUILD_OBJ_ROOT)/tools/Debug/stkrc
stkrc -e -f -o $*.bc $<
endif
%.ll : %.bc
llvm-dis -o $*.ll $<
clean ::
rm -f $(TESTS)
.SUFFIXES: .st .s .ll
.PRECIOUS: %.s %.ll %.bc %.st
.PHONY: test_each test_asm

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#
# ABS test
#
FORWARD success;
FORWARD failure;
: MAIN -23 ABS 23 = IF success ELSE failure ENDIF ;

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#
# ADD test
#
FORWARD success;
FORWARD failure;
: step2 7 93 + 100 = IF success ELSE failure ENDIF ;
: MAIN 93 7 + 100 = IF step2 ELSE failure ENDIF ;

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#
# AND test
#
FORWARD success;
FORWARD failure;
: step2 7 15 AND 7 = IF success ELSE failure ENDIF ;
: MAIN 8 16 AND 0 = IF step2 ELSE failure ENDIF ;

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#
# DECR test
#
FORWARD success;
FORWARD failure;
: MAIN 8 -- 7 = IF success ELSE failure ENDIF ;

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#
# DIV test
#
FORWARD success;
FORWARD failure;
: MAIN 7 49 / 7 = IF success ELSE failure ENDIF ;

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#
# DROP test
#
FORWARD success;
FORWARD failure;
: MAIN 1 2 DROP 1 = IF success ELSE failure ENDIF ;

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#
# DROP2 test
#
FORWARD success;
FORWARD failure;
: step2 0 = IF success ELSE failure ENDIF ;
: MAIN 0 1 2 3 DROP2 1 = IF step2 ELSE failure ENDIF ;

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#
# DUP test
#
FORWARD success;
FORWARD failure;
: phase3 1 = IF success ELSE failure ENDIF ;
: phase2 2 = IF phase3 ELSE failure ENDIF ;
: MAIN 1 2 DUP 2 = IF phase2 ELSE failure ENDIF ;

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#
# DUP2 test
#
FORWARD success;
FORWARD failure;
: phase2 1 = IF success ELSE failure ENDIF ;
: MAIN 1 2 DUP2 2 = IF phase2 ELSE failure ENDIF ;

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#
# EQ test
#
FORWARD success;
FORWARD failure;
: MAIN 17 17 = IF success ELSE failure ENDIF ;

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#
# FALSE test
#
FORWARD success;
FORWARD failure;
: MAIN FALSE 0 = IF success ELSE failure ENDIF ;

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#
# GE test
#
FORWARD success;
FORWARD failure;
: phase2 49 49 >= IF success ELSE failure ENDIF ;
: MAIN 7 49 >= IF phase2 ELSE failure ENDIF ;

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#
# GT test
#
FORWARD success;
FORWARD failure;
: MAIN 7 49 > IF success ELSE failure ENDIF ;

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#
# INCR test
#
FORWARD success;
FORWARD failure;
: MAIN 7 ++ 8 = IF success ELSE failure ENDIF ;

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#
# LE test
#
FORWARD success;
FORWARD failure;
: phase2 49 49 <= IF success ELSE failure ENDIF ;
: MAIN 49 7 <= IF phase2 ELSE failure ENDIF ;

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#
# LT test
#
FORWARD success;
FORWARD failure;
: phase2 49 7 < IF success ELSE failure ENDIF ;
: MAIN 7 49 < IF failure ELSE phase2 ENDIF ;

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#
# MAX test
#
FORWARD success;
FORWARD failure;
: step2 2 1 MAX 2 = IF success ELSE failure ENDIF ;
: MAIN 1 2 MAX 2 = IF step2 ELSE failure ENDIF ;

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#
# MEMORY test
#
FORWARD success;
FORWARD failure;
: try_free FREE ;
: read_space >s ;
: write_space 0 72 PUT 1 69 PUT 2 76 PUT 3 76 PUT 4 79 PUT ;
: try_malloc 64 MALLOC ;
: MAIN try_malloc write_space read_space try_free " - " >s success ;

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#
# MIN test
#
FORWARD success;
FORWARD failure;
: step2 1 2 MIN 1 = IF success ELSE failure ENDIF ;
: MAIN 2 1 MIN 1 = IF step2 ELSE failure ENDIF ;

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#
# MOD value test
#
FORWARD success;
FORWARD failure;
: MAIN 7 13 MOD 6 = IF success ELSE failure ENDIF ;

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#
# MUL value test
#
FORWARD success;
FORWARD failure;
: MAIN 14 7 * 98 = IF success ELSE failure ENDIF ;

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#
# NE test
#
FORWARD success;
FORWARD failure;
: MAIN 7 49 <> IF success ELSE failure ENDIF ;

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#
# NEG test
#
FORWARD success;
FORWARD failure;
: MAIN 23 NEG -23 = IF success ELSE failure ENDIF ;

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#
# NIP test
#
FORWARD success;
FORWARD failure;
: MAIN 1 2 NIP 2 = IF success ELSE failure ENDIF ;

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#
# NIP2 test
#
FORWARD success;
FORWARD failure;
: test_0 0 = IF success ELSE failure ENDIF ;
: test_3 3 = IF test_0 ELSE failure ENDIF ;
: test_4 4 = IF test_3 ELSE failure ENDIF ;
: MAIN 0 1 2 3 4 NIP2 test_4 ;

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#
# OR test
#
FORWARD success;
FORWARD failure;
: phase2 0 0 OR 0 = IF success ELSE failure ENDIF ;
: MAIN 7 8 OR 15 = IF phase2 ELSE failure ENDIF ;

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#
# OUT_CH test
#
FORWARD success;
: MAIN 33 >c success ;

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#
# OUT_NUM test
#
FORWARD success;
: MAIN 33 >d success ;

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#
# OUT_STR test
#
FORWARD success;
: MAIN "!" >s success ;

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#
# OVER test
#
FORWARD success;
FORWARD failure;
: phase4 0 = IF success ELSE failure ENDIF ;
: phase3 2 = IF phase4 ELSE failure ENDIF ;
: phase2 1 = IF phase3 ELSE failure ENDIF ;
: MAIN 0 2 1 OVER 2 = IF phase2 ELSE failure ENDIF ;

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#
# OVER2 test
#
# Logic: // w1 w2 w3 w4 -- w1 w2 w3 w4 w1 w2
#
FORWARD success;
FORWARD failure;
: try_0 0 = IF success ELSE failure ENDIF ;
: try_1b 1 = IF try_0 ELSE failure ENDIF ;
: try_2 2 = IF try_1b ELSE failure ENDIF ;
: try_3 3 = IF try_2 ELSE failure ENDIF ;
: try_4 4 = IF try_3 ELSE failure ENDIF ;
: try_1a 1 = IF try_4 ELSE failure ENDIF ;
: MAIN 0 1 2 3 4 OVER2 2 = IF try_1a ELSE failure ENDIF ;

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#
# PICK test
#
# Logic: // x0 ... Xn n -- x0 ... Xn x0
#
FORWARD success;
FORWARD failure;
: next 10 = IF success ELSE failure ENDIF ;
: MAIN 0 1 2 3 4 5 6 7 8 9 10 5 PICK 5 = IF next ELSE failure ENDIF ;

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#
# RECURSE test
#
FORWARD success;
FORWARD failure;
: recurser 100 = IF 1 + RECURSE;
: MAIN 1 recurser success ;

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#
# RECURSE test
#
FORWARD success;
FORWARD failure;
: returner 17 RETURN ;
: MAIN returner 17 = IF success ELSE failure ENDIF ;

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#
# ROLL test
#
FORWARD success;
: MAIN "Not Implemented Yet - Left As An Exercise - " >s success ;

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#
# DUP test
#
FORWARD success;
FORWARD failure;
: phase4 0 = IF success ELSE failure ENDIF ;
: phase3 2 = IF phase4 ELSE failure ENDIF ;
: phase2 3 = IF phase3 ELSE failure ENDIF ;
: MAIN 0 1 2 3 ROT 1 = IF phase2 ELSE failure ENDIF ;

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#
# ROT2 test
#
# Logic: // w1 w2 w3 w4 w5 w6 -- w3 w4 w5 w6 w1 w2
#
FORWARD success;
FORWARD failure;
: try_0 0 = IF success ELSE failure ENDIF ;
: try_3 3 = IF try_0 ELSE failure ENDIF ;
: try_4 4 = IF try_3 ELSE failure ENDIF ;
: try_5 5 = IF try_4 ELSE failure ENDIF ;
: try_6 6 = IF try_5 ELSE failure ENDIF ;
: try_1 1 = IF try_6 ELSE failure ENDIF ;
: MAIN 0 1 2 3 4 5 6 ROT2 2 = IF try_1 ELSE failure ENDIF ;

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#
# RROT test
#
# Logic: w1 w2 w3 -- w3 w1 w2
#
FORWARD success;
FORWARD failure;
: try_0 0 = IF success ELSE failure ENDIF ;
: try_3 3 = IF try_0 ELSE failure ENDIF ;
: try_1 1 = IF try_3 ELSE failure ENDIF ;
: MAIN 0 1 2 3 RROT 2 = IF try_1 ELSE failure ENDIF ;

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#
# RROT2 test
#
# Logic: // w1 w2 w3 w4 w5 w6 -- w5 w6 w1 w2 w3 w4
#
FORWARD success;
FORWARD failure;
: try_0 0 = IF success ELSE failure ENDIF ;
: try_5 5 = IF try_0 ELSE failure ENDIF ;
: try_6 6 = IF try_5 ELSE failure ENDIF ;
: try_1 1 = IF try_6 ELSE failure ENDIF ;
: try_2 2 = IF try_1 ELSE failure ENDIF ;
: try_3 3 = IF try_2 ELSE failure ENDIF ;
: MAIN 0 1 2 3 4 5 6 RROT2 4 = IF try_3 ELSE failure ENDIF ;

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#
# SELECT test
#
FORWARD success;
FORWARD failure;
: try_99 99 = IF success ELSE failure ENDIF ;
: MAIN 99 10 9 8 7 6 5 4 3 2 1 10 5 SELECT 5 = IF try_99 ELSE failure ENDIF ;

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#
# SHL test
#
FORWARD success;
FORWARD failure;
: show_failure >d SPACE failure ;
: MAIN 64 3 << 512 = IF success ELSE show_failure ENDIF ;

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#
# SHR test
#
FORWARD success;
FORWARD failure;
: show_failure >d SPACE failure ;
: MAIN 64 3 >> 8 = IF success ELSE show_failure ENDIF ;

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#
# SPACE test
#
FORWARD success;
: MAIN ">>" >s SPACE "<<" >s success ;

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#
# */ value test
#
FORWARD success;
FORWARD failure;
: MAIN 17 17 17 */ 17 = IF success ELSE failure ENDIF ;

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#
# SUB test
#
FORWARD success;
FORWARD failure;
: MAIN 23 15 - -8 = IF success ELSE failure ENDIF ;

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#
# DUP test
#
FORWARD success;
FORWARD failure;
: phase3 0 = IF success ELSE failure ENDIF ;
: phase2 2 = IF phase3 ELSE failure ENDIF ;
: MAIN 0 1 2 SWAP 1 = IF phase2 ELSE failure ENDIF ;

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#
# SWAP2 test
#
FORWARD success;
FORWARD failure;
: try_0 0 = IF success ELSE failure ENDIF ;
: try_3 3 = IF try_0 ELSE failure ENDIF ;
: try_4 4 = IF try_3 ELSE failure ENDIF ;
: try_1 1 = IF try_4 ELSE failure ENDIF ;
: MAIN 0 1 2 3 4 SWAP2 2 = IF try_1 ELSE failure ENDIF ;

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#
# TAB test
#
FORWARD success;
: MAIN ">>" >s TAB "<<" >s success ;

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#
# Common definitions for testing
#
: success "Success" >s CR 0 EXIT ;
: failure "Failure" >s CR 1 EXIT ;

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#
# TRUE test
#
FORWARD success;
FORWARD failure;
: MAIN TRUE -1 = IF success ELSE failure ENDIF ;

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#
# TUCK test
#
# Logic: // w1 w2 -- w2 w1 w2
#
FORWARD success;
FORWARD failure;
: try_0 0 = IF success ELSE failure ENDIF ;
: try_2 2 = IF try_0 ELSE failure ENDIF ;
: try_1 1 = IF try_2 ELSE failure ENDIF ;
: MAIN 0 1 2 TUCK 2 = IF try_1 ELSE failure ENDIF ;

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#
# TUCK2 test
#
# Logic: // w1 w2 w3 w4 -- w3 w4 w1 w2 w3 w4
#
FORWARD success;
FORWARD failure;
: try_0 0 = IF success ELSE failure ENDIF ;
: try_3b 3 = IF try_0 ELSE failure ENDIF ;
: try_4 4 = IF try_3b ELSE failure ENDIF ;
: try_1 1 = IF try_4 ELSE failure ENDIF ;
: try_2 2 = IF try_1 ELSE failure ENDIF ;
: try_3a 3 = IF try_2 ELSE failure ENDIF ;
: MAIN 0 1 2 3 4 TUCK2 4 = IF try_3a ELSE failure ENDIF ;

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#
# WHILE test
#
FORWARD success;
FORWARD failure;
: body "." >s DROP -- ;
: do_while WHILE body END ;
: MAIN 20 do_while 0 = IF success ELSE failure ENDIF;

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#
# XOR test
#
FORWARD success;
FORWARD failure;
: MAIN 7 3 XOR 4 = IF success ELSE failure ENDIF ;