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Simplify the shift-expansion code.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19721 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-01-20 20:29:23 +00:00
parent 19ad0620bc
commit e5544f851a
1 changed files with 7 additions and 8 deletions
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15
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -1237,13 +1237,16 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
SDOperand InL, InH;
ExpandOp(Op, InL, InH);
SDOperand ShAmt = LegalizeOp(Amt);
SDOperand OShAmt = ShAmt; // Unmasked shift amount.
MVT::ValueType ShTy = ShAmt.getValueType();
unsigned NVTBits = MVT::getSizeInBits(NVT);
SDOperand NAmt = DAG.getNode(ISD::SUB, ShTy, // NAmt = 32-ShAmt
DAG.getConstant(NVTBits, ShTy), ShAmt);
// Compare the unmasked shift amount against 32.
SDOperand Cond = DAG.getSetCC(ISD::SETGE, TLI.getSetCCResultTy(), ShAmt,
DAG.getConstant(NVTBits, ShTy));
if (TLI.getShiftAmountFlavor() != TargetLowering::Mask) {
ShAmt = DAG.getNode(ISD::AND, ShTy, ShAmt, // ShAmt &= 31
DAG.getConstant(NVTBits-1, ShTy));
@ -1255,10 +1258,8 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << Amt) | (Lo >> NAmt)
DAG.getNode(ISD::SHL, NVT, InH, ShAmt),
DAG.getNode(ISD::SRL, NVT, InL, NAmt));
SDOperand T2 = DAG.getNode(ISD::SHL, NVT, InL, ShAmt); // T2 = Lo << Amt
SDOperand T2 = DAG.getNode(ISD::SHL, NVT, InL, ShAmt); // T2 = Lo << Amt&31
SDOperand Cond = DAG.getSetCC(ISD::SETGE, TLI.getSetCCResultTy(), OShAmt,
DAG.getConstant(NVTBits, ShTy));
Hi = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
Lo = DAG.getNode(ISD::SELECT, NVT, Cond, DAG.getConstant(0, NVT), T2);
} else {
@ -1266,17 +1267,15 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
DAG.getNode(ISD::SHL, NVT, InH, NAmt),
DAG.getNode(ISD::SRL, NVT, InL, ShAmt));
bool isSign = Opc == ISD::SRA;
SDOperand T2 = DAG.getNode(Opc, NVT, InH, ShAmt);
SDOperand T2 = DAG.getNode(Opc, NVT, InH, ShAmt); // T2 = InH >> ShAmt&31
SDOperand HiPart;
if (isSign)
HiPart = DAG.getNode(Opc, NVT, InH, DAG.getConstant(NVTBits-1, ShTy));
else
HiPart = DAG.getConstant(0, NVT);
SDOperand Cond = DAG.getSetCC(ISD::SETGE, TLI.getSetCCResultTy(), OShAmt,
DAG.getConstant(NVTBits, ShTy));
Lo = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
Hi = DAG.getNode(ISD::SELECT, NVT, Cond, HiPart,T2);
Hi = DAG.getNode(ISD::SELECT, NVT, Cond, HiPart, T2);
}
return true;
}