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R600/SI: Allow commuting with src2_modifiers

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221911 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-11-13 19:26:50 +00:00
parent 1aae959de7
commit e59f9f46f7
2 changed files with 25 additions and 5 deletions
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5
lib/Target/R600/SIInstrInfo.cpp
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@ -718,11 +718,6 @@ MachineInstr *SIInstrInfo::commuteInstruction(MachineInstr *MI,
return nullptr;
}
// TODO: Is there any reason to commute with src2 modifiers?
// TODO: Should be able to commute with output modifiers just fine.
if (hasModifiersSet(*MI, AMDGPU::OpName::src2_modifiers))
return nullptr;
// Be sure to copy the source modifiers to the right place.
if (MachineOperand *Src0Mods
= getNamedOperand(*MI, AMDGPU::OpName::src0_modifiers)) {

25
test/CodeGen/R600/commute_modifiers.ll
View File

@ -2,6 +2,7 @@
declare i32 @llvm.r600.read.tidig.x() #1
declare float @llvm.fabs.f32(float) #1
declare float @llvm.fma.f32(float, float, float) nounwind readnone
; FUNC-LABEL: @commute_add_imm_fabs_f32
; SI: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
@ -152,5 +153,29 @@ define void @commute_mul_fabs_x_fneg_fabs_y_f32(float addrspace(1)* %out, float
ret void
}
; Make sure we commute the multiply part for the constant in src0 even
; though we have negate modifier on src2.
; SI-LABEL: {{^}}fma_a_2.0_neg_b_f32
; SI-DAG: buffer_load_dword [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
; SI-DAG: buffer_load_dword [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4
; SI: v_fma_f32 [[RESULT:v[0-9]+]], 2.0, [[R1]], |[[R2]]|
; SI: buffer_store_dword [[RESULT]]
define void @fma_a_2.0_neg_b_f32(float addrspace(1)* %out, float addrspace(1)* %in) {
%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
%gep.0 = getelementptr float addrspace(1)* %out, i32 %tid
%gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
%gep.out = getelementptr float addrspace(1)* %out, i32 %tid
%r1 = load float addrspace(1)* %gep.0
%r2 = load float addrspace(1)* %gep.1
%r2.fabs = call float @llvm.fabs.f32(float %r2)
%r3 = tail call float @llvm.fma.f32(float %r1, float 2.0, float %r2.fabs)
store float %r3, float addrspace(1)* %gep.out
ret void
}
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }