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Add reg-reg and pattern

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75917 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-07-16 13:32:49 +00:00
parent bdc9081693
commit e6220fb230
3 changed files with 24 additions and 0 deletions
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8
lib/Target/SystemZ/SystemZInstrInfo.td
View File

@ -69,6 +69,14 @@ def ADD64ri : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
[(set GR64:$dst, (add GR64:$src1, imm:$src2)),
(implicit PSW)]>;
let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y
// FIXME: Provide proper encoding!
def AND64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
"ngr\t{$dst, $src2}",
[(set GR64:$dst, (and GR64:$src1, GR64:$src2))]>;
}
// FIXME: provide patterns for masked and-with-imm
let isCommutable = 1 in { // X = OR Y, Z == X = OR Z, Y
// FIXME: Provide proper encoding!
def OR64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),

7
test/CodeGen/SystemZ/02-RetAnd.ll Normal file
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@ -0,0 +1,7 @@
; RUN: llvm-as < %s | llc
define i64 @foo(i64 %a, i64 %b) {
entry:
%c = and i64 %a, %b
ret i64 %c
}

9
test/CodeGen/SystemZ/02-RetAndImm.ll Normal file
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@ -0,0 +1,9 @@
; RUN: llvm-as < %s | llc
define i64 @foo(i64 %a, i64 %b) {
entry:
%c = and i64 %a, 1
ret i64 %c
}
; FIXME: SystemZ has 4 and reg-imm instructions depending on imm,
; we need to support them someday.