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Drop the HasInlineAsm flag.

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It is not used any more. We are tracking inline assembly misalignments
directly through the BBInfo.Unalign and KnownBits fields.

A simple conservative size estimate is not good enough since it can
cause alignment padding to be underestimated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146124 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-12-08 01:22:39 +00:00
parent ff4cbb4c9a
commit e6f9e9d836
1 changed files with 2 additions and 8 deletions
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10
lib/Target/ARM/ARMConstantIslandPass.cpp
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@ -226,9 +226,6 @@ namespace {
/// the branch fix up pass.
bool HasFarJump;
/// HasInlineAsm - True if the function contains inline assembly.
bool HasInlineAsm;
const ARMInstrInfo *TII;
const ARMSubtarget *STI;
ARMFunctionInfo *AFI;
@ -338,7 +335,6 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) {
isThumb2 = AFI->isThumb2Function();
HasFarJump = false;
HasInlineAsm = false;
// Renumber all of the machine basic blocks in the function, guaranteeing that
// the numbers agree with the position of the block in the function.
@ -711,10 +707,8 @@ void ARMConstantIslands::ComputeBlockSize(MachineBasicBlock *MBB) {
BBI.Size += TII->GetInstSizeInBytes(I);
// For inline asm, GetInstSizeInBytes returns a conservative estimate.
// The actual size may be smaller, but still a multiple of the instr size.
if (I->isInlineAsm()) {
if (I->isInlineAsm())
BBI.Unalign = isThumb ? 1 : 2;
HasInlineAsm = true;
}
}
// tBR_JTr contains a .align 2 directive.
@ -907,7 +901,7 @@ bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
MachineInstr *CPEMI, unsigned MaxDisp,
bool NegOk, bool DoDump) {
unsigned CPEOffset = GetOffsetOf(CPEMI);
assert((CPEOffset%4 == 0 || HasInlineAsm) && "Misaligned CPE");
assert(CPEOffset % 4 == 0 && "Misaligned CPE");
if (DoDump) {
DEBUG(errs() << "User of CPE#" << CPEMI->getOperand(0).getImm()