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Simple copyConstantToReg support, SETHIi and ORri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12107 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -167,11 +167,27 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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Constant *C, unsigned R) {
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if (C->getType()->isIntegral()) {
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unsigned Class = getClass(C->getType());
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ConstantInt *CI = cast<ConstantInt>(C);
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// cByte: or %g0, <imm>, <dest>
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// cShort or cInt: sethi, then or
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// BuildMI(*MBB, IP, <opcode>, <#regs>, R).addImm(CI->getRawValue());
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switch (Class) {
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case cByte:
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addImm ((uint8_t) CI->getRawValue ());
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return;
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case cShort: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint16_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint16_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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case cInt: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint32_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint32_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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default:
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assert (0 && "Can't move this kind of constant");
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return;
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}
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}
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assert (0 && "Can't copy constants into registers yet");
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@ -62,9 +62,13 @@ def CALL : InstV8 {
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let Name = "call";
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}
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// Section B.9 - SETHI Instruction, p. 102
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def SETHIi: F2_1<0b100, "sethi">;
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// Section B.11 - Logical Instructions, p. 106
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def ANDri : F3_2<2, 0b000001, "and">;
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def ORrr : F3_1<2, 0b000010, "or">;
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def ORri : F3_2<2, 0b000010, "or">;
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// Section B.12 - Shift Instructions, p. 107
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def SLLri : F3_1<2, 0b100101, "sll">;
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@ -167,11 +167,27 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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Constant *C, unsigned R) {
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if (C->getType()->isIntegral()) {
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unsigned Class = getClass(C->getType());
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ConstantInt *CI = cast<ConstantInt>(C);
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// cByte: or %g0, <imm>, <dest>
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// cShort or cInt: sethi, then or
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// BuildMI(*MBB, IP, <opcode>, <#regs>, R).addImm(CI->getRawValue());
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switch (Class) {
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case cByte:
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addImm ((uint8_t) CI->getRawValue ());
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return;
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case cShort: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint16_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint16_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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case cInt: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint32_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint32_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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default:
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assert (0 && "Can't move this kind of constant");
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return;
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}
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}
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assert (0 && "Can't copy constants into registers yet");
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@ -167,11 +167,27 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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Constant *C, unsigned R) {
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if (C->getType()->isIntegral()) {
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unsigned Class = getClass(C->getType());
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ConstantInt *CI = cast<ConstantInt>(C);
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// cByte: or %g0, <imm>, <dest>
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// cShort or cInt: sethi, then or
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// BuildMI(*MBB, IP, <opcode>, <#regs>, R).addImm(CI->getRawValue());
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switch (Class) {
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case cByte:
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addImm ((uint8_t) CI->getRawValue ());
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return;
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case cShort: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint16_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint16_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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case cInt: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint32_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint32_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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default:
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assert (0 && "Can't move this kind of constant");
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return;
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}
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}
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assert (0 && "Can't copy constants into registers yet");
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@ -167,11 +167,27 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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Constant *C, unsigned R) {
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if (C->getType()->isIntegral()) {
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unsigned Class = getClass(C->getType());
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ConstantInt *CI = cast<ConstantInt>(C);
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// cByte: or %g0, <imm>, <dest>
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// cShort or cInt: sethi, then or
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// BuildMI(*MBB, IP, <opcode>, <#regs>, R).addImm(CI->getRawValue());
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switch (Class) {
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case cByte:
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addImm ((uint8_t) CI->getRawValue ());
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return;
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case cShort: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint16_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint16_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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case cInt: {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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BuildMI (*MBB, IP, V8::SETHIi, 1, TmpReg).addImm (((uint32_t) CI->getRawValue ()) >> 10);
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (TmpReg).addImm (((uint32_t) CI->getRawValue ()) & 0x03ff);
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return;
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}
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default:
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assert (0 && "Can't move this kind of constant");
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return;
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}
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}
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assert (0 && "Can't copy constants into registers yet");
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@ -62,9 +62,13 @@ def CALL : InstV8 {
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let Name = "call";
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}
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// Section B.9 - SETHI Instruction, p. 102
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def SETHIi: F2_1<0b100, "sethi">;
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// Section B.11 - Logical Instructions, p. 106
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def ANDri : F3_2<2, 0b000001, "and">;
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def ORrr : F3_1<2, 0b000010, "or">;
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def ORri : F3_2<2, 0b000010, "or">;
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// Section B.12 - Shift Instructions, p. 107
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def SLLri : F3_1<2, 0b100101, "sll">;
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