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BuildSDIV and BuildUDIV only work for i32/i64, but they don't check that

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the input is that type, this caused a failure on gs on X86 last night.
Move the hard checks into Build[US]Div since that is where decisions like
this should be made.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23881 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-10-22 18:50:15 +00:00
parent 5476b9bfce
commit e9936d14b8
1 changed files with 20 additions and 10 deletions
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30
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -817,9 +817,9 @@ SDOperand DAGCombiner::visitSDIV(SDNode *N) {
// if integer divide is expensive and we satisfy the requirements, emit an
// alternate sequence.
if (N1C && (N1C->getSignExtended() < -1 || N1C->getSignExtended() > 1) &&
!TLI.isIntDivCheap() &&
TLI.isOperationLegal(ISD::MULHS, VT) && TLI.isTypeLegal(VT)) {
return BuildSDIV(N);
!TLI.isIntDivCheap()) {
SDOperand Op = BuildSDIV(N);
if (Op.Val) return Op;
}
return SDOperand();
}
@ -841,9 +841,11 @@ SDOperand DAGCombiner::visitUDIV(SDNode *N) {
DAG.getConstant(Log2_64(N1C->getValue()),
TLI.getShiftAmountTy()));
// fold (udiv x, c) -> alternate
if (N1C && N1C->getValue() && TLI.isOperationLegal(ISD::MULHU, VT) &&
TLI.isTypeLegal(VT) && !TLI.isIntDivCheap())
return BuildUDIV(N);
if (N1C && N1C->getValue() && !TLI.isIntDivCheap()) {
SDOperand Op = BuildUDIV(N);
if (Op.Val) return Op;
}
return SDOperand();
}
@ -2583,8 +2585,12 @@ SDOperand DAGCombiner::SimplifySetCC(MVT::ValueType VT, SDOperand N0,
/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
MVT::ValueType VT = N->getValueType(0);
assert((VT == MVT::i32 || VT == MVT::i64) &&
"BuildSDIV only operates on i32 or i64!");
// Check to see if we can do this.
if (!TLI.isTypeLegal(VT) || (VT != MVT::i32 && VT != MVT::i64))
return SDOperand(); // BuildSDIV only operates on i32 or i64
if (!TLI.isOperationLegal(ISD::MULHS, VT))
return SDOperand(); // Make sure the target supports MULHS.
int64_t d = cast<ConstantSDNode>(N->getOperand(1))->getSignExtended();
ms magics = (VT == MVT::i32) ? magic32(d) : magic64(d);
@ -2622,8 +2628,12 @@ SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
SDOperand DAGCombiner::BuildUDIV(SDNode *N) {
MVT::ValueType VT = N->getValueType(0);
assert((VT == MVT::i32 || VT == MVT::i64) &&
"BuildUDIV only operates on i32 or i64!");
// Check to see if we can do this.
if (!TLI.isTypeLegal(VT) || (VT != MVT::i32 && VT != MVT::i64))
return SDOperand(); // BuildUDIV only operates on i32 or i64
if (!TLI.isOperationLegal(ISD::MULHU, VT))
return SDOperand(); // Make sure the target supports MULHU.
uint64_t d = cast<ConstantSDNode>(N->getOperand(1))->getValue();
mu magics = (VT == MVT::i32) ? magicu32(d) : magicu64(d);