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Fix for PR4051. When 2address pass delete an instruction, update kill info when necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70279 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -88,6 +88,9 @@ namespace {
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bool NoUseAfterLastDef(unsigned Reg, MachineBasicBlock *MBB, unsigned Dist,
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unsigned &LastDef);
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MachineInstr *FindLastUseInMBB(unsigned Reg, MachineBasicBlock *MBB,
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unsigned Dist);
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bool isProfitableToCommute(unsigned regB, unsigned regC,
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MachineInstr *MI, MachineBasicBlock *MBB,
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unsigned Dist);
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@ -310,6 +313,28 @@ bool TwoAddressInstructionPass::NoUseAfterLastDef(unsigned Reg,
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return !(LastUse > LastDef && LastUse < Dist);
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}
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MachineInstr *TwoAddressInstructionPass::FindLastUseInMBB(unsigned Reg,
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MachineBasicBlock *MBB,
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unsigned Dist) {
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unsigned LastUseDist = Dist;
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MachineInstr *LastUse = 0;
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for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(Reg),
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E = MRI->reg_end(); I != E; ++I) {
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MachineOperand &MO = I.getOperand();
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MachineInstr *MI = MO.getParent();
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if (MI->getParent() != MBB)
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continue;
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DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(MI);
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if (DI == DistanceMap.end())
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continue;
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if (MO.isUse() && DI->second < LastUseDist) {
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LastUse = DI->first;
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LastUseDist = DI->second;
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}
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}
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return LastUse;
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}
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/// isCopyToReg - Return true if the specified MI is a copy instruction or
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/// a extract_subreg instruction. It also returns the source and destination
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/// registers and whether they are physical registers by reference.
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@ -684,7 +709,9 @@ void TwoAddressInstructionPass::ProcessCopy(MachineInstr *MI,
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/// isSafeToDelete - If the specified instruction does not produce any side
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/// effects and all of its defs are dead, then it's safe to delete.
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static bool isSafeToDelete(MachineInstr *MI, const TargetInstrInfo *TII) {
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static bool isSafeToDelete(MachineInstr *MI, unsigned Reg,
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const TargetInstrInfo *TII,
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SmallVector<unsigned, 4> &Kills) {
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const TargetInstrDesc &TID = MI->getDesc();
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if (TID.mayStore() || TID.isCall())
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return false;
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@ -693,10 +720,12 @@ static bool isSafeToDelete(MachineInstr *MI, const TargetInstrInfo *TII) {
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg() || !MO.isDef())
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if (!MO.isReg())
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continue;
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if (!MO.isDead())
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if (MO.isDef() && !MO.isDead())
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return false;
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if (MO.isUse() && MO.getReg() != Reg && MO.isKill())
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Kills.push_back(MO.getReg());
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}
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return true;
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@ -787,11 +816,53 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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if (!isKilled(*mi, regB, MRI, TII)) {
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// If regA is dead and the instruction can be deleted, just delete
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// it so it doesn't clobber regB.
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if (mi->getOperand(ti).isDead() && isSafeToDelete(mi, TII)) {
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mbbi->erase(mi); // Nuke the old inst.
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mi = nmi;
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++NumDeletes;
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break; // Done with this instruction.
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SmallVector<unsigned, 4> Kills;
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if (mi->getOperand(ti).isDead() &&
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isSafeToDelete(mi, regB, TII, Kills)) {
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SmallVector<std::pair<std::pair<unsigned, bool>
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,MachineInstr*>, 4> NewKills;
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bool ReallySafe = true;
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// If this instruction kills some virtual registers, we need
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// update the kill information. If it's not possible to do so,
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// then bail out.
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while (!Kills.empty()) {
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unsigned Kill = Kills.back();
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Kills.pop_back();
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if (TargetRegisterInfo::isPhysicalRegister(Kill)) {
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ReallySafe = false;
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break;
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}
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MachineInstr *LastKill = FindLastUseInMBB(Kill, &*mbbi, Dist);
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if (LastKill) {
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bool isModRef = LastKill->modifiesRegister(Kill);
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NewKills.push_back(std::make_pair(std::make_pair(Kill,isModRef),
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LastKill));
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} else {
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ReallySafe = false;
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break;
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}
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}
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if (ReallySafe) {
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if (LV) {
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while (!NewKills.empty()) {
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MachineInstr *NewKill = NewKills.back().second;
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unsigned Kill = NewKills.back().first.first;
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bool isDead = NewKills.back().first.second;
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NewKills.pop_back();
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if (LV->removeVirtualRegisterKilled(Kill, mi)) {
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if (isDead)
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LV->addVirtualRegisterDead(Kill, NewKill);
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else
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LV->addVirtualRegisterKilled(Kill, NewKill);
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}
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}
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}
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mbbi->erase(mi); // Nuke the old inst.
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mi = nmi;
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++NumDeletes;
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break; // Done with this instruction.
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}
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}
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// If this instruction is commutative, check to see if C dies. If
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23
test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll
Normal file
23
test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll
Normal file
@ -0,0 +1,23 @@
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; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9
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; PR4051
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define void @int163(i32 %p_4, i32 %p_5) nounwind {
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entry:
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%0 = tail call i32 @foo(i32 1) nounwind ; <i32> [#uses=2]
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%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
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br i1 %1, label %bb.i, label %bar.exit
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bb.i: ; preds = %entry
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%2 = lshr i32 1, %0 ; <i32> [#uses=1]
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%3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
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%retval.i = select i1 %3, i32 1, i32 %p_5 ; <i32> [#uses=1]
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br label %bar.exit
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bar.exit: ; preds = %bb.i, %entry
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%4 = phi i32 [ %retval.i, %bb.i ], [ %p_5, %entry ] ; <i32> [#uses=1]
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%5 = icmp eq i32 %4, 0 ; <i1> [#uses=0]
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%6 = tail call i32 @foo(i32 %p_5) nounwind ; <i32> [#uses=0]
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ret void
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}
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declare i32 @foo(i32)
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