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[mips] NaCl should now use the custom MipsELFStreamer (recently added) in spite
of MCELFStreamer. This is so that changes to MipsELFStreamer will automatically propagate through its subclasses. No functional changes (MipsELFStreamer has the same functionality of MCELFStreamer at the moment). Differential Revision: http://llvm-reviews.chandlerc.com/D3130 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204918 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -25,6 +25,7 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg);
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MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
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raw_ostream &OS,
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MCCodeEmitter *Emitter,
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const MCSubtargetInfo &STI,
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bool RelaxAll, bool NoExecStack);
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}
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@ -116,7 +116,7 @@ static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
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S = createMipsELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll,
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NoExecStack);
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else
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S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll,
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S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll,
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NoExecStack);
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new MipsTargetELFStreamer(*S, STI);
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return S;
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@ -20,6 +20,7 @@
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#define DEBUG_TYPE "mips-mc-nacl"
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#include "Mips.h"
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#include "MipsELFStreamer.h"
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#include "MipsMCNaCl.h"
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#include "llvm/MC/MCELFStreamer.h"
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@ -33,11 +34,11 @@ const unsigned LoadStoreStackMaskReg = Mips::T7;
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/// Extend the generic MCELFStreamer class so that it can mask dangerous
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/// instructions.
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class MipsNaClELFStreamer : public MCELFStreamer {
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class MipsNaClELFStreamer : public MipsELFStreamer {
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public:
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MipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS,
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MCCodeEmitter *Emitter)
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: MCELFStreamer(Context, TAB, OS, Emitter), PendingCall(false) {}
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MCCodeEmitter *Emitter, const MCSubtargetInfo &STI)
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: MipsELFStreamer(Context, TAB, OS, Emitter, STI), PendingCall(false) {}
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~MipsNaClELFStreamer() {}
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@ -81,7 +82,7 @@ private:
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MaskInst.addOperand(MCOperand::CreateReg(AddrReg));
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MaskInst.addOperand(MCOperand::CreateReg(AddrReg));
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MaskInst.addOperand(MCOperand::CreateReg(MaskReg));
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MCELFStreamer::EmitInstruction(MaskInst, STI);
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MipsELFStreamer::EmitInstruction(MaskInst, STI);
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}
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// Sandbox indirect branch or return instruction by inserting mask operation
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@ -91,7 +92,7 @@ private:
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EmitBundleLock(false);
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emitMask(AddrReg, IndirectBranchMaskReg, STI);
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MCELFStreamer::EmitInstruction(MI, STI);
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MipsELFStreamer::EmitInstruction(MI, STI);
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EmitBundleUnlock();
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}
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@ -106,7 +107,7 @@ private:
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unsigned BaseReg = MI.getOperand(AddrIdx).getReg();
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emitMask(BaseReg, LoadStoreStackMaskReg, STI);
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}
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MCELFStreamer::EmitInstruction(MI, STI);
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MipsELFStreamer::EmitInstruction(MI, STI);
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if (MaskAfter) {
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// Sandbox SP change.
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unsigned SPReg = MI.getOperand(0).getReg();
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@ -145,7 +146,7 @@ public:
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if (MaskBefore || MaskAfter)
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sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter);
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else
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MCELFStreamer::EmitInstruction(Inst, STI);
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MipsELFStreamer::EmitInstruction(Inst, STI);
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return;
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}
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@ -162,20 +163,20 @@ public:
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unsigned TargetReg = Inst.getOperand(1).getReg();
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emitMask(TargetReg, IndirectBranchMaskReg, STI);
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}
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MCELFStreamer::EmitInstruction(Inst, STI);
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MipsELFStreamer::EmitInstruction(Inst, STI);
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PendingCall = true;
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return;
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}
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if (PendingCall) {
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// Finish the sandboxing sequence by emitting branch delay.
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MCELFStreamer::EmitInstruction(Inst, STI);
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MipsELFStreamer::EmitInstruction(Inst, STI);
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EmitBundleUnlock();
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PendingCall = false;
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return;
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}
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// None of the sandboxing applies, just emit the instruction.
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MCELFStreamer::EmitInstruction(Inst, STI);
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MipsELFStreamer::EmitInstruction(Inst, STI);
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}
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};
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@ -235,9 +236,11 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg) {
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MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
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raw_ostream &OS,
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MCCodeEmitter *Emitter, bool RelaxAll,
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bool NoExecStack) {
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MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter);
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MCCodeEmitter *Emitter,
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const MCSubtargetInfo &STI,
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bool RelaxAll, bool NoExecStack) {
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MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter,
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STI);
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if (RelaxAll)
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S->getAssembler().setRelaxAll(true);
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if (NoExecStack)
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