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[mips] NaCl should now use the custom MipsELFStreamer (recently added) in spite

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of MCELFStreamer.

This is so that changes to MipsELFStreamer will automatically propagate through
its subclasses.

No functional changes (MipsELFStreamer has the same functionality of MCELFStreamer
at the moment).

Differential Revision: http://llvm-reviews.chandlerc.com/D3130


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204918 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matheus Almeida 2014-03-27 11:52:20 +00:00
parent 7123b1a43e
commit ea28b322f8
3 changed files with 18 additions and 14 deletions
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1
lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h
View File

@ -25,6 +25,7 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg);
MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS, raw_ostream &OS,
MCCodeEmitter *Emitter, MCCodeEmitter *Emitter,
const MCSubtargetInfo &STI,
bool RelaxAll, bool NoExecStack); bool RelaxAll, bool NoExecStack);
} }

2
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
View File

@ -116,7 +116,7 @@ static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
S = createMipsELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll, S = createMipsELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll,
NoExecStack); NoExecStack);
else else
S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll, S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll,
NoExecStack); NoExecStack);
new MipsTargetELFStreamer(*S, STI); new MipsTargetELFStreamer(*S, STI);
return S; return S;

29
lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
View File

@ -20,6 +20,7 @@
#define DEBUG_TYPE "mips-mc-nacl" #define DEBUG_TYPE "mips-mc-nacl"
#include "Mips.h" #include "Mips.h"
#include "MipsELFStreamer.h"
#include "MipsMCNaCl.h" #include "MipsMCNaCl.h"
#include "llvm/MC/MCELFStreamer.h" #include "llvm/MC/MCELFStreamer.h"
@ -33,11 +34,11 @@ const unsigned LoadStoreStackMaskReg = Mips::T7;
/// Extend the generic MCELFStreamer class so that it can mask dangerous /// Extend the generic MCELFStreamer class so that it can mask dangerous
/// instructions. /// instructions.
class MipsNaClELFStreamer : public MCELFStreamer { class MipsNaClELFStreamer : public MipsELFStreamer {
public: public:
MipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS, MipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS,
MCCodeEmitter *Emitter) MCCodeEmitter *Emitter, const MCSubtargetInfo &STI)
: MCELFStreamer(Context, TAB, OS, Emitter), PendingCall(false) {} : MipsELFStreamer(Context, TAB, OS, Emitter, STI), PendingCall(false) {}
~MipsNaClELFStreamer() {} ~MipsNaClELFStreamer() {}
@ -81,7 +82,7 @@ private:
MaskInst.addOperand(MCOperand::CreateReg(AddrReg)); MaskInst.addOperand(MCOperand::CreateReg(AddrReg));
MaskInst.addOperand(MCOperand::CreateReg(AddrReg)); MaskInst.addOperand(MCOperand::CreateReg(AddrReg));
MaskInst.addOperand(MCOperand::CreateReg(MaskReg)); MaskInst.addOperand(MCOperand::CreateReg(MaskReg));
MCELFStreamer::EmitInstruction(MaskInst, STI); MipsELFStreamer::EmitInstruction(MaskInst, STI);
} }
// Sandbox indirect branch or return instruction by inserting mask operation // Sandbox indirect branch or return instruction by inserting mask operation
@ -91,7 +92,7 @@ private:
EmitBundleLock(false); EmitBundleLock(false);
emitMask(AddrReg, IndirectBranchMaskReg, STI); emitMask(AddrReg, IndirectBranchMaskReg, STI);
MCELFStreamer::EmitInstruction(MI, STI); MipsELFStreamer::EmitInstruction(MI, STI);
EmitBundleUnlock(); EmitBundleUnlock();
} }
@ -106,7 +107,7 @@ private:
unsigned BaseReg = MI.getOperand(AddrIdx).getReg(); unsigned BaseReg = MI.getOperand(AddrIdx).getReg();
emitMask(BaseReg, LoadStoreStackMaskReg, STI); emitMask(BaseReg, LoadStoreStackMaskReg, STI);
} }
MCELFStreamer::EmitInstruction(MI, STI); MipsELFStreamer::EmitInstruction(MI, STI);
if (MaskAfter) { if (MaskAfter) {
// Sandbox SP change. // Sandbox SP change.
unsigned SPReg = MI.getOperand(0).getReg(); unsigned SPReg = MI.getOperand(0).getReg();
@ -145,7 +146,7 @@ public:
if (MaskBefore || MaskAfter) if (MaskBefore || MaskAfter)
sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter); sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter);
else else
MCELFStreamer::EmitInstruction(Inst, STI); MipsELFStreamer::EmitInstruction(Inst, STI);
return; return;
} }
@ -162,20 +163,20 @@ public:
unsigned TargetReg = Inst.getOperand(1).getReg(); unsigned TargetReg = Inst.getOperand(1).getReg();
emitMask(TargetReg, IndirectBranchMaskReg, STI); emitMask(TargetReg, IndirectBranchMaskReg, STI);
} }
MCELFStreamer::EmitInstruction(Inst, STI); MipsELFStreamer::EmitInstruction(Inst, STI);
PendingCall = true; PendingCall = true;
return; return;
} }
if (PendingCall) { if (PendingCall) {
// Finish the sandboxing sequence by emitting branch delay. // Finish the sandboxing sequence by emitting branch delay.
MCELFStreamer::EmitInstruction(Inst, STI); MipsELFStreamer::EmitInstruction(Inst, STI);
EmitBundleUnlock(); EmitBundleUnlock();
PendingCall = false; PendingCall = false;
return; return;
} }
// None of the sandboxing applies, just emit the instruction. // None of the sandboxing applies, just emit the instruction.
MCELFStreamer::EmitInstruction(Inst, STI); MipsELFStreamer::EmitInstruction(Inst, STI);
} }
}; };
@ -235,9 +236,11 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg) {
MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS, raw_ostream &OS,
MCCodeEmitter *Emitter, bool RelaxAll, MCCodeEmitter *Emitter,
bool NoExecStack) { const MCSubtargetInfo &STI,
MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter); bool RelaxAll, bool NoExecStack) {
MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter,
STI);
if (RelaxAll) if (RelaxAll)
S->getAssembler().setRelaxAll(true); S->getAssembler().setRelaxAll(true);
if (NoExecStack) if (NoExecStack)