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enable LSR by default on alpha

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24337 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-11-12 19:21:08 +00:00
parent 6467dfa40d
commit ea2fdf9380
1 changed files with 3 additions and 7 deletions
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10
lib/Target/Alpha/AlphaTargetMachine.cpp
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@ -29,9 +29,6 @@ namespace {
}
namespace llvm {
cl::opt<bool> EnableAlphaLSR("enable-lsr-for-alpha",
cl::desc("Enable LSR for Alpha (beta option!)"),
cl::Hidden);
cl::opt<bool> EnableAlphaDAG("enable-dag-isel-for-alpha",
cl::desc("Enable DAG ISEL for Alpha (beta option!)"),
cl::Hidden);
@ -81,10 +78,7 @@ bool AlphaTargetMachine::addPassesToEmitFile(PassManager &PM,
bool Fast) {
if (FileType != TargetMachine::AssemblyFile) return true;
if (EnableAlphaLSR) {
PM.add(createLoopStrengthReducePass());
PM.add(createCFGSimplificationPass());
}
PM.add(createLoopStrengthReducePass());
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
@ -98,6 +92,8 @@ bool AlphaTargetMachine::addPassesToEmitFile(PassManager &PM,
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createCFGSimplificationPass());
if (EnableAlphaDAG)
PM.add(createAlphaISelDag(*this));
else