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Add the testcase from pr13254 (the old scalarreply pass handles this wrong;

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the new sroa pass handles it right).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165644 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2012-10-10 18:41:19 +00:00
parent 1b40b84a51
commit ea46827d6c
1 changed files with 16 additions and 0 deletions
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16
test/Transforms/SROA/vector-promotion.ll
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@ -189,3 +189,19 @@ entry:
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
define i64 @test6(<4 x i64> %x, <4 x i64> %y, i64 %n) {
; CHECK: @test6
; The old scalarrepl pass would wrongly drop the store to the second alloca.
; PR13254
%tmp = alloca { <4 x i64>, <4 x i64> }
%p0 = getelementptr inbounds { <4 x i64>, <4 x i64> }* %tmp, i32 0, i32 0
store <4 x i64> %x, <4 x i64>* %p0
; CHECK: store <4 x i64> %x,
%p1 = getelementptr inbounds { <4 x i64>, <4 x i64> }* %tmp, i32 0, i32 1
store <4 x i64> %y, <4 x i64>* %p1
; CHECK: store <4 x i64> %y,
%addr = getelementptr inbounds { <4 x i64>, <4 x i64> }* %tmp, i32 0, i32 0, i64 %n
%res = load i64* %addr, align 4
ret i64 %res
}