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Jump tables on Alpha

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30463 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2006-09-18 18:01:03 +00:00
parent 303c6222a4
commit ea4f9d5801
3 changed files with 38 additions and 2 deletions
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8
lib/Target/Alpha/AlphaAsmPrinter.cpp
View File

@ -126,6 +126,11 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
O << Mang->getValueName(MO.getGlobal());
return;
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
<< '_' << MO.getJumpTableIndex();
return;
default:
O << "<unknown operand type: " << MO.getType() << ">";
return;
@ -156,6 +161,9 @@ bool AlphaAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
// Print out constants referenced by the function
EmitConstantPool(MF.getConstantPool());
// Print out jump tables referenced by the function
EmitJumpTableInfo(MF.getJumpTableInfo());
// Print out labels for the function.
const Function *F = MF.getFunction();
SwitchToTextSection(".text", F);

20
lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -48,7 +48,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM)
addRegisterClass(MVT::f64, Alpha::F8RCRegisterClass);
addRegisterClass(MVT::f32, Alpha::F4RCRegisterClass);
setOperationAction(ISD::BRIND, MVT::i64, Expand);
// setOperationAction(ISD::BRIND, MVT::i64, Expand);
setOperationAction(ISD::BR_CC, MVT::Other, Expand);
setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
@ -128,6 +128,8 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM)
setOperationAction(ISD::RET, MVT::Other, Custom);
setOperationAction(ISD::JumpTable, MVT::i64, Custom);
setStackPointerRegisterToSaveRestore(Alpha::R30);
setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
@ -162,6 +164,20 @@ const char *AlphaTargetLowering::getTargetNodeName(unsigned Opcode) const {
}
}
static SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG) {
MVT::ValueType PtrVT = Op.getValueType();
JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
SDOperand JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
SDOperand Zero = DAG.getConstant(0, PtrVT);
const TargetMachine &TM = DAG.getTarget();
SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, JTI,
DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, JTI, Hi);
return Lo;
}
//http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/
//AA-PY8AC-TET1_html/callCH3.html#BLOCK21
@ -395,6 +411,8 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
VarArgsOffset,
GP, RA);
case ISD::RET: return LowerRET(Op,DAG, getVRegRA());
case ISD::JumpTable: return LowerJumpTable(Op, DAG);
case ISD::SINT_TO_FP: {
assert(MVT::i64 == Op.getOperand(0).getValueType() &&
"Unhandled SINT_TO_FP type in custom expander!");

12
lib/Target/Alpha/AlphaInstrInfo.td
View File

@ -435,7 +435,11 @@ let isReturn = 1, isTerminator = 1, noResults = 1, Ra = 31, Rb = 26, disp = 1, U
def RETDAGp : MbrpForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine
}
def JMP : MbrForm< 0x1A, 0x00, (ops GPRC:$RD, GPRC:$RS, GPRC:$DISP), "jmp $RD,($RS),$DISP", s_jsr>; //Jump
let isBranch = 1, isTerminator = 1, noResults = 1, isBarrier = 1,
Ra = 31, disp = 0 in
def JMP : MbrpForm< 0x1A, 0x00, (ops GPRC:$RS), "jmp $$31,($RS),0",
[(brind GPRC:$RS)], s_jsr>; //Jump
let isCall = 1, noResults = 1, Ra = 26,
Defs = [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19,
R20, R21, R22, R23, R24, R25, R26, R27, R28, R29,
@ -545,6 +549,12 @@ def : Pat<(f32 (load (Alpha_gprello tconstpool:$DISP, GPRC:$RB))),
def : Pat<(f64 (load (Alpha_gprello tconstpool:$DISP, GPRC:$RB))),
(LDTr tconstpool:$DISP, GPRC:$RB)>;
//jumptable rels
def : Pat<(i64 (Alpha_gprelhi tjumptable:$DISP, GPRC:$RB)),
(LDAHr tjumptable:$DISP, GPRC:$RB)>;
def : Pat<(i64 (Alpha_gprello tjumptable:$DISP, GPRC:$RB)),
(LDAr tjumptable:$DISP, GPRC:$RB)>;
//misc ext patterns
def : Pat<(i64 (extload (add GPRC:$RB, immSExt16:$DISP), i8)),