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added sign extend for boolean

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20137 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-02-12 19:35:12 +00:00
parent 3689a34489
commit ebce50464a
1 changed files with 5 additions and 3 deletions
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8
lib/Target/Alpha/AlphaISelPattern.cpp
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@ -56,9 +56,6 @@ namespace {
setOperationAction(ISD::SEXTLOAD , MVT::i8 , Expand);
setOperationAction(ISD::SEXTLOAD , MVT::i16 , Expand);
//what is the sign expansion of 1? 1 or -1?
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
setOperationAction(ISD::SREM , MVT::f32 , Expand);
setOperationAction(ISD::SREM , MVT::f64 , Expand);
@ -959,6 +956,11 @@ unsigned ISel::SelectExpr(SDOperand N) {
case MVT::i8:
BuildMI(BB, Alpha::SEXTB, 1, Result).addReg(Tmp1);
break;
case MVT::i1:
Tmp2 = MakeReg(MVT::i64);
BuildMI(BB, Alpha::ANDi, 2, Tmp2).addReg(Tmp1).addImm(1);
BuildMI(BB, Alpha::SUB, 2, Result).addReg(Alpha::F31).addReg(Tmp2);
break;
}
return Result;
}