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Fix PR773
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28207 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -3071,8 +3071,26 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
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case ISD::FREM:
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case ISD::FREM:
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case ISD::FCOPYSIGN:
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case ISD::FCOPYSIGN:
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// These operators require that their input be fp extended.
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// These operators require that their input be fp extended.
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switch (getTypeAction(Node->getOperand(0).getValueType())) {
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case Legal:
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Tmp1 = LegalizeOp(Node->getOperand(0));
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break;
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case Promote:
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Tmp1 = PromoteOp(Node->getOperand(0));
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Tmp1 = PromoteOp(Node->getOperand(0));
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break;
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case Expand:
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assert(0 && "not implemented");
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}
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switch (getTypeAction(Node->getOperand(1).getValueType())) {
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case Legal:
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Tmp2 = LegalizeOp(Node->getOperand(1));
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break;
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case Promote:
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Tmp2 = PromoteOp(Node->getOperand(1));
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Tmp2 = PromoteOp(Node->getOperand(1));
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break;
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case Expand:
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assert(0 && "not implemented");
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}
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Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
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Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
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// Perform FP_ROUND: this is probably overly pessimistic.
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// Perform FP_ROUND: this is probably overly pessimistic.
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