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Teach TransferDeadness to delete truly dead instructions if they do not produce side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71606 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -350,29 +350,44 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) {
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if (!vni->def || vni->def == ~1U || vni->def == ~0U)
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return Reg;
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MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def);
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg, PhysReg;
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if (!CopyMI ||
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!tii_->isMoveInstr(*CopyMI, SrcReg, DstReg, SrcSubReg, DstSubReg))
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return Reg;
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PhysReg = SrcReg;
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if (TargetRegisterInfo::isVirtualRegister(SrcReg)) {
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if (!vrm_->isAssignedReg(SrcReg))
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return Reg;
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else
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SrcReg = vrm_->getPhys(SrcReg);
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PhysReg = vrm_->getPhys(SrcReg);
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}
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if (Reg == SrcReg)
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if (Reg == PhysReg)
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return Reg;
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const TargetRegisterClass *RC = mri_->getRegClass(cur.reg);
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if (!RC->contains(SrcReg))
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if (!RC->contains(PhysReg))
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return Reg;
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// Try to coalesce.
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if (!li_->conflictsWithPhysRegDef(cur, *vrm_, SrcReg)) {
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DOUT << "Coalescing: " << cur << " -> " << tri_->getName(SrcReg)
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if (!li_->conflictsWithPhysRegDef(cur, *vrm_, PhysReg)) {
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DOUT << "Coalescing: " << cur << " -> " << tri_->getName(PhysReg)
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<< '\n';
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vrm_->clearVirt(cur.reg);
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vrm_->assignVirt2Phys(cur.reg, SrcReg);
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vrm_->assignVirt2Phys(cur.reg, PhysReg);
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// Remove unnecessary kills since a copy does not clobber the register.
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if (li_->hasInterval(SrcReg)) {
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LiveInterval &SrcLI = li_->getInterval(SrcReg);
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for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(cur.reg),
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E = mri_->reg_end(); I != E; ++I) {
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MachineOperand &O = I.getOperand();
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if (!O.isUse() || !O.isKill())
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continue;
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MachineInstr *MI = &*I;
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if (SrcLI.liveAt(li_->getDefIndex(li_->getInstructionIndex(MI))))
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O.setIsKill(false);
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}
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}
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++NumCoalesce;
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return SrcReg;
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}
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@ -851,6 +851,14 @@ void AssignPhysToVirtReg(MachineInstr *MI, unsigned VirtReg, unsigned PhysReg) {
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}
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}
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namespace {
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struct RefSorter {
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bool operator()(const std::pair<MachineInstr*, int> &A,
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const std::pair<MachineInstr*, int> &B) {
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return A.second < B.second;
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}
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};
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}
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// ***************************** //
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// Local Spiller Implementation //
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@ -1313,9 +1321,10 @@ private:
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/// removed. Find the last def or use and mark it as dead / kill.
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void TransferDeadness(MachineBasicBlock *MBB, unsigned CurDist,
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unsigned Reg, BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps) {
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int LastUDDist = -1;
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MachineInstr *LastUDMI = NULL;
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM) {
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SmallPtrSet<MachineInstr*, 4> Seens;
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SmallVector<std::pair<MachineInstr*, int>,8> Refs;
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for (MachineRegisterInfo::reg_iterator RI = RegInfo->reg_begin(Reg),
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RE = RegInfo->reg_end(); RI != RE; ++RI) {
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MachineInstr *UDMI = &*RI;
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@ -1324,13 +1333,18 @@ private:
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DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UDMI);
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if (DI == DistanceMap.end() || DI->second > CurDist)
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continue;
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if ((int)DI->second < LastUDDist)
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continue;
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LastUDDist = DI->second;
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LastUDMI = UDMI;
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if (Seens.insert(UDMI))
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Refs.push_back(std::make_pair(UDMI, DI->second));
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}
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if (LastUDMI) {
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if (Refs.empty())
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return;
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std::sort(Refs.begin(), Refs.end(), RefSorter());
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while (!Refs.empty()) {
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MachineInstr *LastUDMI = Refs.back().first;
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Refs.pop_back();
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MachineOperand *LastUD = NULL;
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for (unsigned i = 0, e = LastUDMI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = LastUDMI->getOperand(i);
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@ -1339,14 +1353,24 @@ private:
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if (!LastUD || (LastUD->isUse() && MO.isDef()))
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LastUD = &MO;
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if (LastUDMI->isRegTiedToDefOperand(i))
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return;
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break;
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}
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if (LastUD->isDef())
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LastUD->setIsDead();
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else {
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if (LastUD->isDef()) {
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// If the instruction has no side effect, delete it and propagate
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// backward further. Otherwise, mark is dead and we are done.
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const TargetInstrDesc &TID = LastUDMI->getDesc();
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if (TID.mayStore() || TID.isCall() || TID.isTerminator() ||
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TID.hasUnmodeledSideEffects()) {
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LastUD->setIsDead();
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break;
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}
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VRM.RemoveMachineInstrFromMaps(LastUDMI);
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MBB->erase(LastUDMI);
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} else {
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LastUD->setIsKill();
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RegKills.set(Reg);
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KillOps[Reg] = LastUD;
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break;
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}
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}
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}
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@ -2027,7 +2051,7 @@ private:
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TRI->isSubRegister(KillRegs[0], Dst) ||
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TRI->isSuperRegister(KillRegs[0], Dst));
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// Last def is now dead.
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TransferDeadness(&MBB, Dist, Src, RegKills, KillOps);
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TransferDeadness(&MBB, Dist, Src, RegKills, KillOps, VRM);
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}
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VRM.RemoveMachineInstrFromMaps(&MI);
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MBB.erase(&MI);
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@ -1,4 +1,5 @@
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; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2
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; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | not grep movhlps
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define void @test() nounwind {
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test.exit:
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