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TableGen no longer emit CopyFromReg nodes for implicit results in physical

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registers. The scheduler is now responsible for emitting them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41781 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2007-09-07 23:59:02 +00:00
parent 82d25148a7
commit ef61ed3507
3 changed files with 17 additions and 90 deletions
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44
lib/Target/X86/X86ISelDAGToDAG.cpp
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@@ -1063,50 +1063,6 @@ SDNode *X86DAGToDAGISel::Select(SDOperand N) {
break;
}
case ISD::MUL: {
if (NVT == MVT::i8) {
SDOperand N0 = Node->getOperand(0);
SDOperand N1 = Node->getOperand(1);
SDOperand Tmp0, Tmp1, Tmp2, Tmp3;
bool foldedLoad = TryFoldLoad(N, N1, Tmp0, Tmp1, Tmp2, Tmp3);
if (!foldedLoad) {
foldedLoad = TryFoldLoad(N, N0, Tmp0, Tmp1, Tmp2, Tmp3);
if (foldedLoad)
std::swap(N0, N1);
}
SDNode *ResNode;
if (foldedLoad) {
SDOperand Chain = N1.getOperand(0);
AddToISelQueue(N0);
AddToISelQueue(Chain);
AddToISelQueue(Tmp0);
AddToISelQueue(Tmp1);
AddToISelQueue(Tmp2);
AddToISelQueue(Tmp3);
SDOperand InFlag(0, 0);
Chain = CurDAG->getCopyToReg(Chain, X86::AL, N0, InFlag);
InFlag = Chain.getValue(1);
SDOperand Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Chain, InFlag };
ResNode = CurDAG->getTargetNode(X86::MUL8m, MVT::i8, MVT::i8,
MVT::Other, Ops, 6);
ReplaceUses(N1.getValue(1), SDOperand(ResNode, 2));
} else {
SDOperand Chain = CurDAG->getEntryNode();
AddToISelQueue(N0);
AddToISelQueue(N1);
SDOperand InFlag(0, 0);
InFlag = CurDAG->getCopyToReg(Chain, X86::AL, N0, InFlag).getValue(1);
ResNode = CurDAG->getTargetNode(X86::MUL8r, MVT::i8, MVT::i8,
N1, InFlag);
}
ReplaceUses(N.getValue(0), SDOperand(ResNode, 0));
return NULL;
}
break;
}
case ISD::MULHU:
case ISD::MULHS: {
if (Opcode == ISD::MULHU)