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Allow targets to select source order pre-RA scheduler.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148033 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2012-01-12 18:27:52 +00:00
parent dd929fc704
commit f0a95356d6
2 changed files with 3 additions and 1 deletions
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1
include/llvm/Target/TargetLowering.h
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@ -56,6 +56,7 @@ namespace llvm {
namespace Sched {
enum Preference {
None, // No preference
Source, // Follow source order.
RegPressure, // Scheduling for lowest register pressure.
Hybrid, // Scheduling for both latency and register pressure.
ILP // Scheduling for ILP in low register pressure mode.

3
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -218,7 +218,8 @@ namespace llvm {
CodeGenOpt::Level OptLevel) {
const TargetLowering &TLI = IS->getTargetLowering();
if (OptLevel == CodeGenOpt::None)
if (OptLevel == CodeGenOpt::None ||
TLI.getSchedulingPreference() == Sched::Source)
return createSourceListDAGScheduler(IS, OptLevel);
if (TLI.getSchedulingPreference() == Sched::RegPressure)
return createBURRListDAGScheduler(IS, OptLevel);