6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-25 19:29:53 +00:00
Code Issues Projects Releases Wiki Activity

Tweak the expansion code for BIT_CONVERT to generate better code

Browse Source 
converting from an MMX vector to an i64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73024 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2009-06-07 09:41:57 +00:00
parent 5d28eb9e97
commit f10d3a7bcd
2 changed files with 30 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
View File

@ -92,6 +92,26 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
} }
} }
if (InVT.isVector() && OutVT.isInteger()) {
// Handle cases like i64 = BIT_CONVERT v1i64 on x86, where the operand
// is legal but the result is not.
MVT NVT = MVT::getVectorVT(TLI.getTypeToTransformTo(OutVT), 2);
if (isTypeLegal(NVT)) {
SDValue CastInOp = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, InOp);
MVT EltNVT = NVT.getVectorElementType();
Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltNVT, CastInOp,
DAG.getIntPtrConstant(0));
Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltNVT, CastInOp,
DAG.getIntPtrConstant(1));
if (TLI.isBigEndian())
std::swap(Lo, Hi);
return;
}
}
// Lower the bit-convert to a store/load from the stack. // Lower the bit-convert to a store/load from the stack.
assert(NOutVT.isByteSized() && "Expanded type not byte sized!"); assert(NOutVT.isByteSized() && "Expanded type not byte sized!");

10
test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll Normal file
View File

@ -0,0 +1,10 @@
; RUN: llvm-as < %s | llc | grep movl | count 2
define i64 @a(i32 %a, i32 %b) nounwind readnone {
entry:
%0 = insertelement <2 x i32> undef, i32 %a, i32 0 ; <<2 x i32>> [#uses=1]
%1 = insertelement <2 x i32> %0, i32 %b, i32 1 ; <<2 x i32>> [#uses=1]
%conv = bitcast <2 x i32> %1 to i64 ; <i64> [#uses=1]
ret i64 %conv
}