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ARM Pseudo-ize tBR_JTr.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2010-11-29 19:32:47 +00:00
parent 00a035f74f
commit f1aa47dc1a
5 changed files with 19 additions and 28 deletions
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20
lib/Target/ARM/ARMAsmPrinter.cpp
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@@ -936,23 +936,13 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
EmitJump2Table(MI);
return;
}
case ARM::tBR_JTr: {
// Lower and emit the instruction itself, then the jump table following it.
MCInst TmpInst;
// FIXME: The branch instruction is really a pseudo. We should xform it
// explicitly.
LowerARMMachineInstrToMCInst(MI, TmpInst, *this);
OutStreamer.EmitInstruction(TmpInst);
// Output the data for the jump table itself
EmitJumpTable(MI);
return;
}
case ARM::tBR_JTr:
case ARM::BR_JTr: {
// Lower and emit the instruction itself, then the jump table following it.
// mov pc, target
MCInst TmpInst;
TmpInst.setOpcode(ARM::MOVr);
unsigned Opc = MI->getOpcode() == ARM::BR_JTr ? ARM::MOVr : ARM::tMOVr;
TmpInst.setOpcode(Opc);
TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
// Add predicate operands.
@@ -960,6 +950,10 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
TmpInst.addOperand(MCOperand::CreateReg(0));
OutStreamer.EmitInstruction(TmpInst);
// Make sure the Thumb jump table is 4-byte aligned.
if (Opc == ARM::tMOVr)
EmitAlignment(2);
// Output the data for the jump table itself
EmitJumpTable(MI);
return;