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For PR1205:
Convert some calls to ConstantInt::getZExtValue() into getValue() and use APInt facilities in the subsequent computations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35294 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -733,7 +733,7 @@ static void ComputeMaskedBits(Value *V, APInt Mask, APInt& KnownZero,
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assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
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KnownZero <<= ShiftAmt;
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KnownOne <<= ShiftAmt;
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KnownZero |= APInt(BitWidth, 1ULL).shl(ShiftAmt)-1; // low bits known zero.
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KnownZero |= APInt(BitWidth, 1ULL).shl(ShiftAmt)-1; // low bits known 0
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return;
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}
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break;
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@ -2213,12 +2213,12 @@ static bool isSignBitCheck(ICmpInst::Predicate pred, ConstantInt *RHS) {
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return RHS->isAllOnesValue();
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case ICmpInst::ICMP_UGE:
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// True if LHS u>= RHS and RHS == high-bit-mask (2^7, 2^15, 2^31, etc)
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return RHS->getZExtValue() == (1ULL <<
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(RHS->getType()->getPrimitiveSizeInBits()-1));
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return RHS->getValue() ==
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APInt::getSignBit(RHS->getType()->getPrimitiveSizeInBits());
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case ICmpInst::ICMP_UGT:
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// True if LHS u> RHS and RHS == high-bit-mask - 1
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return RHS->getZExtValue() ==
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(1ULL << (RHS->getType()->getPrimitiveSizeInBits()-1))-1;
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return RHS->getValue() ==
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APInt::getSignedMaxValue(RHS->getType()->getPrimitiveSizeInBits());
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default:
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return false;
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}
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@ -2553,7 +2553,7 @@ static Constant *GetFactor(Value *V) {
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} else if (I->getOpcode() == Instruction::And) {
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if (ConstantInt *RHS = dyn_cast<ConstantInt>(I->getOperand(1))) {
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// X & 0xFFF0 is known to be a multiple of 16.
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unsigned Zeros = CountTrailingZeros_64(RHS->getZExtValue());
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uint32_t Zeros = RHS->getValue().countTrailingZeros();
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if (Zeros != V->getType()->getPrimitiveSizeInBits())
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return ConstantExpr::getShl(Result,
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ConstantInt::get(Result->getType(), Zeros));
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@ -3082,18 +3082,17 @@ Instruction *InstCombiner::InsertRangeTest(Value *V, Constant *Lo, Constant *Hi,
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// MSB, so 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs. 0x0F0F0000 is
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// not, since all 1s are not contiguous.
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static bool isRunOfOnes(ConstantInt *Val, unsigned &MB, unsigned &ME) {
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uint64_t V = Val->getZExtValue();
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if (!isShiftedMask_64(V)) return false;
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APInt V = Val->getValue();
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uint32_t BitWidth = Val->getType()->getBitWidth();
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if (!APIntOps::isShiftedMask(BitWidth, V)) return false;
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// look for the first zero bit after the run of ones
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MB = 64-CountLeadingZeros_64((V - 1) ^ V);
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MB = BitWidth - ((V - 1) ^ V).countLeadingZeros();
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// look for the first non-zero bit
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ME = 64-CountLeadingZeros_64(V);
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ME = V.getActiveBits();
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return true;
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}
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/// FoldLogicalPlusAnd - This is part of an expression (LHS +/- RHS) & Mask,
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/// where isSub determines whether the operator is a sub. If we can fold one of
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/// the following xforms:
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