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https://github.com/c64scene-ar/llvm-6502.git
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Add missing const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37341 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -191,9 +191,9 @@ bool MachineInstr::isPredicable() const {
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/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
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/// the specific register or -1 if it is not found. It further tightening
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/// the search criteria to a use that kills the register if isKill is true.
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int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) {
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int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
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MachineOperand &MO = getOperand(i);
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const MachineOperand &MO = getOperand(i);
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if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
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if (!isKill || MO.isKill())
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return i;
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@ -212,17 +212,18 @@ MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
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return NULL;
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}
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/// findFirstPredOperand() - Find the first operand in the operand list that
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// is used to represent the predicate.
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MachineOperand *MachineInstr::findFirstPredOperand() {
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/// findFirstPredOperandIdx() - Find the index of the first operand in the
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/// operand list that is used to represent the predicate. It returns -1 if
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/// none is found.
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int MachineInstr::findFirstPredOperandIdx() const {
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const TargetInstrDescriptor *TID = getInstrDescriptor();
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if (TID->Flags & M_PREDICABLE) {
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
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if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
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return &getOperand(i);
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return i;
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}
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return NULL;
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return -1;
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}
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/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
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