Patch r153892 for PR11861 apparently broke an external project (see PR12493).

This patch restores TwoAddressInstructionPass's pre-r153892 behaviour when
rescheduling instructions in TryInstructionTransform. Hopefully this will fix
PR12493. To refix PR11861, lowering of INSERT_SUBREGS is deferred until after
the copy that unties the operands is emitted (this seems to be a more
appropriate fix for that issue anyway).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154338 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames
2012-04-09 20:17:30 +00:00
parent 96b66d65c2
commit f31ceaf8b7

View File

@@ -1183,8 +1183,9 @@ TwoAddressInstructionPass::RescheduleKillAboveMI(MachineBasicBlock *MBB,
/// TryInstructionTransform - For the case where an instruction has a single
/// pair of tied register operands, attempt some transformations that may
/// either eliminate the tied operands or improve the opportunities for
/// coalescing away the register copy. Returns true if the tied operands
/// are eliminated altogether.
/// coalescing away the register copy. Returns true if no copy needs to be
/// inserted to untie mi's operands (either because they were untied, or
/// because mi was rescheduled, and will be visited again later).
bool TwoAddressInstructionPass::
TryInstructionTransform(MachineBasicBlock::iterator &mi,
MachineBasicBlock::iterator &nmi,
@@ -1248,7 +1249,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi,
// re-schedule this MI below it.
if (RescheduleMIBelowKill(mbbi, mi, nmi, regB)) {
++NumReSchedDowns;
return false;
return true;
}
if (TargetRegisterInfo::isVirtualRegister(regA))
@@ -1270,7 +1271,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi,
// re-schedule it before this MI if it's legal.
if (RescheduleKillAboveMI(mbbi, mi, nmi, regB)) {
++NumReSchedUps;
return false;
return true;
}
// If this is an instruction with a load folded into it, try unfolding
@@ -1594,7 +1595,6 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
MadeChange = true;
DEBUG(dbgs() << "\t\trewrite to:\t" << *mi);
}
// Rewrite INSERT_SUBREG as COPY now that we no longer need SSA form.
if (mi->isInsertSubreg()) {
@@ -1608,6 +1608,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
mi->setDesc(TII->get(TargetOpcode::COPY));
DEBUG(dbgs() << "\t\tconvert to:\t" << *mi);
}
}
// Clear TiedOperands here instead of at the top of the loop
// since most instructions do not have tied operands.