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https://github.com/c64scene-ar/llvm-6502.git
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Updates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30245 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
0f4aa6ee20
commit
f47d167c3b
@ -147,32 +147,6 @@ and ISD::FMAX node types?
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//===---------------------------------------------------------------------===//
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The first BB of this code:
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declare bool %foo()
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int %bar() {
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%V = call bool %foo()
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br bool %V, label %T, label %F
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T:
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ret int 1
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F:
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call bool %foo()
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ret int 12
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}
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compiles to:
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_bar:
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subl $12, %esp
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call L_foo$stub
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xorb $1, %al
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testb %al, %al
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jne LBB_bar_2 # F
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It would be better to emit "cmp %al, 1" than a xor and test.
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//===---------------------------------------------------------------------===//
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Lower memcpy / memset to a series of SSE 128 bit move instructions when it's
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feasible.
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@ -274,33 +248,6 @@ instead of por and movdqa. Does it matter?
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//===---------------------------------------------------------------------===//
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Use movddup to splat a v2f64 directly from a memory source. e.g.
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#include <emmintrin.h>
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void test(__m128d *r, double A) {
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*r = _mm_set1_pd(A);
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}
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llc:
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_test:
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movsd 8(%esp), %xmm0
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unpcklpd %xmm0, %xmm0
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movl 4(%esp), %eax
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movapd %xmm0, (%eax)
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ret
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icc:
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_test:
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movl 4(%esp), %eax
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movddup 8(%esp), %xmm0
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movapd %xmm0, (%eax)
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ret
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//===---------------------------------------------------------------------===//
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X86RegisterInfo::copyRegToReg() returns X86::MOVAPSrr for VR128. Is it possible
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to choose between movaps, movapd, and movdqa based on types of source and
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destination?
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@ -311,69 +258,6 @@ shorter.
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//===---------------------------------------------------------------------===//
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We are emitting bad code for this:
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float %test(float* %V, int %I, int %D, float %V) {
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entry:
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%tmp = seteq int %D, 0
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br bool %tmp, label %cond_true, label %cond_false23
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cond_true:
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%tmp3 = getelementptr float* %V, int %I
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%tmp = load float* %tmp3
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%tmp5 = setgt float %tmp, %V
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%tmp6 = tail call bool %llvm.isunordered.f32( float %tmp, float %V )
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%tmp7 = or bool %tmp5, %tmp6
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br bool %tmp7, label %UnifiedReturnBlock, label %cond_next
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cond_next:
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%tmp10 = add int %I, 1
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%tmp12 = getelementptr float* %V, int %tmp10
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%tmp13 = load float* %tmp12
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%tmp15 = setle float %tmp13, %V
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%tmp16 = tail call bool %llvm.isunordered.f32( float %tmp13, float %V )
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%tmp17 = or bool %tmp15, %tmp16
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%retval = select bool %tmp17, float 0.000000e+00, float 1.000000e+00
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ret float %retval
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cond_false23:
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%tmp28 = tail call float %foo( float* %V, int %I, int %D, float %V )
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ret float %tmp28
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UnifiedReturnBlock: ; preds = %cond_true
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ret float 0.000000e+00
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}
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declare bool %llvm.isunordered.f32(float, float)
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declare float %foo(float*, int, int, float)
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It exposes a known load folding problem:
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movss (%edx,%ecx,4), %xmm1
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ucomiss %xmm1, %xmm0
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As well as this:
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LBB_test_2: # cond_next
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movss LCPI1_0, %xmm2
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pxor %xmm3, %xmm3
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ucomiss %xmm0, %xmm1
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jbe LBB_test_6 # cond_next
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LBB_test_5: # cond_next
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movaps %xmm2, %xmm3
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LBB_test_6: # cond_next
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movss %xmm3, 40(%esp)
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flds 40(%esp)
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addl $44, %esp
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ret
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Clearly it's unnecessary to clear %xmm3. It's also not clear why we are emitting
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three moves (movss, movaps, movss).
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//===---------------------------------------------------------------------===//
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External test Nurbs exposed some problems. Look for
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__ZN15Nurbs_SSE_Cubic17TessellateSurfaceE, bb cond_next140. This is what icc
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emits:
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@ -390,44 +390,6 @@ require a copy to be inserted (in X86InstrInfo::convertToThreeAddress).
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//===---------------------------------------------------------------------===//
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This code generates ugly code, probably due to costs being off or something:
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void %test(float* %P, <4 x float>* %P2 ) {
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%xFloat0.688 = load float* %P
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%loadVector37.712 = load <4 x float>* %P2
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%inFloat3.713 = insertelement <4 x float> %loadVector37.712, float 0.000000e+00, uint 3
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store <4 x float> %inFloat3.713, <4 x float>* %P2
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ret void
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}
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Generates:
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_test:
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pxor %xmm0, %xmm0
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movd %xmm0, %eax ;; EAX = 0!
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movl 8(%esp), %ecx
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movaps (%ecx), %xmm0
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pinsrw $6, %eax, %xmm0
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shrl $16, %eax ;; EAX = 0 again!
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pinsrw $7, %eax, %xmm0
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movaps %xmm0, (%ecx)
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ret
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It would be better to generate:
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_test:
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movl 8(%esp), %ecx
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movaps (%ecx), %xmm0
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xor %eax, %eax
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pinsrw $6, %eax, %xmm0
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pinsrw $7, %eax, %xmm0
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movaps %xmm0, (%ecx)
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ret
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or use pxor (to make a zero vector) and shuffle (to insert it).
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//===---------------------------------------------------------------------===//
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Bad codegen:
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char foo(int x) { return x; }
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