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Mips assembler: Assembler macro ADDIU $rs,imm
This patch adds alias for addiu instruction which enables following syntax: addiu $rs,imm The macro is translated as: addiu $rs,$rs,imm Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181729 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1095,7 +1095,8 @@ def : InstAlias<"mfc2 $rt, $rd",
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(MFC2_3OP CPURegsOpnd:$rt, CPURegsOpnd:$rd, 0), 0>;
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def : InstAlias<"mtc2 $rt, $rd",
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(MTC2_3OP CPURegsOpnd:$rd, 0, CPURegsOpnd:$rt), 0>;
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def : InstAlias<"addiu $rs, $imm",
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(ADDiu CPURegsOpnd:$rs, CPURegsOpnd:$rs, simm16:$imm), 0>;
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//===----------------------------------------------------------------------===//
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// Assembler Pseudo Instructions
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//===----------------------------------------------------------------------===//
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@ -70,6 +70,7 @@
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# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x24]
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# CHECK: addi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x20]
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# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x24]
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# CHECK: addiu $11, $11, 40 # encoding: [0x28,0x00,0x6b,0x25]
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# CHECK: addu $9, $6, $7 # encoding: [0x21,0x48,0xc7,0x00]
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# CHECK: madd $6, $7 # encoding: [0x00,0x00,0xc7,0x70]
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# CHECK: maddu $6, $7 # encoding: [0x01,0x00,0xc7,0x70]
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@ -91,6 +92,7 @@
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addu $9,$6,-15001
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addi $9,$6,17767
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addiu $9,$6,-15001
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addiu $11,40
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addu $9,$6,$7
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madd $6,$7
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maddu $6,$7
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