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Convert Thumb2 tests to FileCheck for PR5307.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89595 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Edward O'Callaghan 2009-11-22 15:18:27 +00:00
parent bfd987ba57
commit f4a93dd70e
12 changed files with 130 additions and 26 deletions
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5
test/CodeGen/Thumb2/thumb2-add3.ll
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@ -1,6 +1,9 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {addw\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#4095} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
%tmp = add i32 %a, 4095
ret i32 %tmp
}
; CHECK: f1:
; CHECK: addw r0, r0, #4095

12
test/CodeGen/Thumb2/thumb2-and2.ll
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@ -1,31 +1,41 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {
%tmp = and i32 %a, 171
ret i32 %tmp
}
; CHECK: f1:
; CHECK: and r0, r0, #171
; 1179666 = 0x00120012
define i32 @f2(i32 %a) {
%tmp = and i32 %a, 1179666
ret i32 %tmp
}
; CHECK: f2:
; CHECK: and r0, r0, #1179666
; 872428544 = 0x34003400
define i32 @f3(i32 %a) {
%tmp = and i32 %a, 872428544
ret i32 %tmp
}
; CHECK: f3:
; CHECK: and r0, r0, #872428544
; 1448498774 = 0x56565656
define i32 @f4(i32 %a) {
%tmp = and i32 %a, 1448498774
ret i32 %tmp
}
; CHECK: f4:
; CHECK: and r0, r0, #1448498774
; 66846720 = 0x03fc0000
define i32 @f5(i32 %a) {
%tmp = and i32 %a, 66846720
ret i32 %tmp
}
; CHECK: f5:
; CHECK: and r0, r0, #66846720

23
test/CodeGen/Thumb2/thumb2-cmn.ll
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@ -1,32 +1,36 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i1 @f1(i32 %a, i32 %b) {
%nb = sub i32 0, %b
%tmp = icmp ne i32 %a, %nb
ret i1 %tmp
}
; CHECK: f1:
; CHECK: cmn.w r0, r1
define i1 @f2(i32 %a, i32 %b) {
%nb = sub i32 0, %b
%tmp = icmp ne i32 %nb, %a
ret i1 %tmp
}
; CHECK: f2:
; CHECK: cmn.w r0, r1
define i1 @f3(i32 %a, i32 %b) {
%nb = sub i32 0, %b
%tmp = icmp eq i32 %a, %nb
ret i1 %tmp
}
; CHECK: f3:
; CHECK: cmn.w r0, r1
define i1 @f4(i32 %a, i32 %b) {
%nb = sub i32 0, %b
%tmp = icmp eq i32 %nb, %a
ret i1 %tmp
}
; CHECK: f4:
; CHECK: cmn.w r0, r1
define i1 @f5(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
@ -34,6 +38,8 @@ define i1 @f5(i32 %a, i32 %b) {
%tmp1 = icmp eq i32 %nb, %a
ret i1 %tmp1
}
; CHECK: f5:
; CHECK: cmn.w r0, r1, lsl #5
define i1 @f6(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
@ -41,6 +47,8 @@ define i1 @f6(i32 %a, i32 %b) {
%tmp1 = icmp ne i32 %nb, %a
ret i1 %tmp1
}
; CHECK: f6:
; CHECK: cmn.w r0, r1, lsr #6
define i1 @f7(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
@ -48,6 +56,8 @@ define i1 @f7(i32 %a, i32 %b) {
%tmp1 = icmp eq i32 %a, %nb
ret i1 %tmp1
}
; CHECK: f7:
; CHECK: cmn.w r0, r1, asr #7
define i1 @f8(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
@ -57,3 +67,6 @@ define i1 @f8(i32 %a, i32 %b) {
%tmp1 = icmp ne i32 %a, %nb
ret i1 %tmp1
}
; CHECK: f8:
; CHECK: cmn.w r0, r0, ror #8

6
test/CodeGen/Thumb2/thumb2-mla.ll
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@ -1,13 +1,17 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {mla\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 2
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b
%tmp2 = add i32 %c, %tmp1
ret i32 %tmp2
}
; CHECK: f1:
; CHECK: mla r0, r0, r1, r2
define i32 @f2(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b
%tmp2 = add i32 %tmp1, %c
ret i32 %tmp2
}
; CHECK: f2:
; CHECK: mla r0, r0, r1, r2

7
test/CodeGen/Thumb2/thumb2-mls.ll
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@ -1,10 +1,12 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {mls\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b
%tmp2 = sub i32 %c, %tmp1
ret i32 %tmp2
}
; CHECK: f1:
; CHECK: mls r0, r0, r1, r2
; sub doesn't commute, so no mls for this one
define i32 @f2(i32 %a, i32 %b, i32 %c) {
@ -12,3 +14,6 @@ define i32 @f2(i32 %a, i32 %b, i32 %c) {
%tmp2 = sub i32 %tmp1, %c
ret i32 %tmp2
}
; CHECK: f2:
; CHECK: muls r0, r1

12
test/CodeGen/Thumb2/thumb2-orn2.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*#\[0-9\]*} |\
; RUN: grep {#187\\|#11141290\\|#-872363008\\|#1114112} | count 4
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; 0x000000bb = 187
define i32 @f1(i32 %a) {
@ -7,6 +7,8 @@ define i32 @f1(i32 %a) {
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}
; CHECK: f1:
; CHECK: orn r0, r0, #187
; 0x00aa00aa = 11141290
define i32 @f2(i32 %a) {
@ -14,6 +16,8 @@ define i32 @f2(i32 %a) {
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}
; CHECK: f2:
; CHECK: orn r0, r0, #11141290
; 0xcc00cc00 = 3422604288
define i32 @f3(i32 %a) {
@ -21,6 +25,8 @@ define i32 @f3(i32 %a) {
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}
; CHECK: f3:
; CHECK: orn r0, r0, #-872363008
; 0x00110000 = 1114112
define i32 @f5(i32 %a) {
@ -28,3 +34,5 @@ define i32 @f5(i32 %a) {
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}
; CHECK: f5:
; CHECK: orn r0, r0, #1114112

5
test/CodeGen/Thumb2/thumb2-ror.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {ror\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*#\[0-9\]*} | grep 22 | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
%l8 = shl i32 %a, 10
@ -6,3 +7,5 @@ define i32 @f1(i32 %a) {
%tmp = or i32 %l8, %r8
ret i32 %tmp
}
; CHECK: f1:
; CHECK: ror.w r0, r0, #22

21
test/CodeGen/Thumb2/thumb2-rsb.ll
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@ -1,30 +1,35 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f2(i32 %a, i32 %b) {
define i32 @f1(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}
; CHECK: f1:
; CHECK: rsb r0, r0, r1, lsl #5
define i32 @f3(i32 %a, i32 %b) {
define i32 @f2(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}
; CHECK: f2:
; CHECK: rsb r0, r0, r1, lsr #6
define i32 @f4(i32 %a, i32 %b) {
define i32 @f3(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}
; CHECK: f3:
; CHECK: rsb r0, r0, r1, asr #7
define i32 @f5(i32 %a, i32 %b) {
define i32 @f4(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}
; CHECK: f4:
; CHECK: rsb r0, r0, r0, ror #8

12
test/CodeGen/Thumb2/thumb2-rsb2.ll
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@ -1,31 +1,41 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {
%tmp = sub i32 171, %a
ret i32 %tmp
}
; CHECK: f1:
; CHECK: rsb.w r0, r0, #171
; 1179666 = 0x00120012
define i32 @f2(i32 %a) {
%tmp = sub i32 1179666, %a
ret i32 %tmp
}
; CHECK: f2:
; CHECK: rsb.w r0, r0, #1179666
; 872428544 = 0x34003400
define i32 @f3(i32 %a) {
%tmp = sub i32 872428544, %a
ret i32 %tmp
}
; CHECK: f3:
; CHECK: rsb.w r0, r0, #872428544
; 1448498774 = 0x56565656
define i32 @f4(i32 %a) {
%tmp = sub i32 1448498774, %a
ret i32 %tmp
}
; CHECK: f4:
; CHECK: rsb.w r0, r0, #1448498774
; 66846720 = 0x03fc0000
define i32 @f5(i32 %a) {
%tmp = sub i32 66846720, %a
ret i32 %tmp
}
; CHECK: f5:
; CHECK: rsb.w r0, r0, #66846720

4
test/CodeGen/Thumb2/thumb2-sub2.ll
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@ -1,6 +1,8 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {subw\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#4095} | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
%tmp = sub i32 %a, 4095
ret i32 %tmp
}
; CHECK: f1:
; CHECK: subw r0, r0, #4095

25
test/CodeGen/Thumb2/thumb2-teq.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {teq\\.w\\W*r\[0-9\],\\W*#\[0-9\]*} | \
; RUN: grep {#187\\|#11141290\\|#-872363008\\|#1114112\\|#-572662307} | count 10
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; 0x000000bb = 187
define i1 @f1(i32 %a) {
@ -7,6 +7,8 @@ define i1 @f1(i32 %a) {
%tmp1 = icmp ne i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f1:
; CHECK: teq.w r0, #187
; 0x000000bb = 187
define i1 @f2(i32 %a) {
@ -14,6 +16,8 @@ define i1 @f2(i32 %a) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f2:
; CHECK: teq.w r0, #187
; 0x00aa00aa = 11141290
define i1 @f3(i32 %a) {
@ -21,6 +25,8 @@ define i1 @f3(i32 %a) {
%tmp1 = icmp eq i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f3:
; CHECK: teq.w r0, #11141290
; 0x00aa00aa = 11141290
define i1 @f4(i32 %a) {
@ -28,6 +34,8 @@ define i1 @f4(i32 %a) {
%tmp1 = icmp ne i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f4:
; CHECK: teq.w r0, #11141290
; 0xcc00cc00 = 3422604288
define i1 @f5(i32 %a) {
@ -35,6 +43,8 @@ define i1 @f5(i32 %a) {
%tmp1 = icmp ne i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f5:
; CHECK: teq.w r0, #-872363008
; 0xcc00cc00 = 3422604288
define i1 @f6(i32 %a) {
@ -42,6 +52,8 @@ define i1 @f6(i32 %a) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f6:
; CHECK: teq.w r0, #-872363008
; 0xdddddddd = 3722304989
define i1 @f7(i32 %a) {
@ -49,6 +61,8 @@ define i1 @f7(i32 %a) {
%tmp1 = icmp eq i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f7:
; CHECK: teq.w r0, #-572662307
; 0xdddddddd = 3722304989
define i1 @f8(i32 %a) {
@ -56,6 +70,8 @@ define i1 @f8(i32 %a) {
%tmp1 = icmp ne i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f8:
; CHECK: teq.w r0, #-572662307
; 0x00110000 = 1114112
define i1 @f9(i32 %a) {
@ -63,6 +79,8 @@ define i1 @f9(i32 %a) {
%tmp1 = icmp ne i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f9:
; CHECK: teq.w r0, #1114112
; 0x00110000 = 1114112
define i1 @f10(i32 %a) {
@ -70,3 +88,6 @@ define i1 @f10(i32 %a) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f10:
; CHECK: teq.w r0, #1114112

24
test/CodeGen/Thumb2/thumb2-tst.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*#\[0-9\]*} | \
; RUN: grep {#187\\|#11141290\\|#-872363008\\|#1114112\\|#-572662307} | count 10
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; 0x000000bb = 187
define i1 @f1(i32 %a) {
@ -7,6 +7,8 @@ define i1 @f1(i32 %a) {
%tmp1 = icmp ne i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f1:
; CHECK: tst.w r0, #187
; 0x000000bb = 187
define i1 @f2(i32 %a) {
@ -14,6 +16,8 @@ define i1 @f2(i32 %a) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f2:
; CHECK: tst.w r0, #187
; 0x00aa00aa = 11141290
define i1 @f3(i32 %a) {
@ -21,6 +25,8 @@ define i1 @f3(i32 %a) {
%tmp1 = icmp eq i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f3:
; CHECK: tst.w r0, #11141290
; 0x00aa00aa = 11141290
define i1 @f4(i32 %a) {
@ -28,6 +34,8 @@ define i1 @f4(i32 %a) {
%tmp1 = icmp ne i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f4:
; CHECK: tst.w r0, #11141290
; 0xcc00cc00 = 3422604288
define i1 @f5(i32 %a) {
@ -35,6 +43,8 @@ define i1 @f5(i32 %a) {
%tmp1 = icmp ne i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f5:
; CHECK: tst.w r0, #-872363008
; 0xcc00cc00 = 3422604288
define i1 @f6(i32 %a) {
@ -42,6 +52,8 @@ define i1 @f6(i32 %a) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f6:
; CHECK: tst.w r0, #-872363008
; 0xdddddddd = 3722304989
define i1 @f7(i32 %a) {
@ -49,6 +61,8 @@ define i1 @f7(i32 %a) {
%tmp1 = icmp eq i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f7:
; CHECK: tst.w r0, #-572662307
; 0xdddddddd = 3722304989
define i1 @f8(i32 %a) {
@ -56,6 +70,8 @@ define i1 @f8(i32 %a) {
%tmp1 = icmp ne i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f8:
; CHECK: tst.w r0, #-572662307
; 0x00110000 = 1114112
define i1 @f9(i32 %a) {
@ -63,6 +79,8 @@ define i1 @f9(i32 %a) {
%tmp1 = icmp ne i32 %tmp, 0
ret i1 %tmp1
}
; CHECK: f9:
; CHECK: tst.w r0, #1114112
; 0x00110000 = 1114112
define i1 @f10(i32 %a) {
@ -70,3 +88,5 @@ define i1 @f10(i32 %a) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
; CHECK: f10:
; CHECK: tst.w r0, #1114112