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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-22 10:29:35 +00:00
Fix shuffle decoding logic to handle UNPCKLPS/UNPCKLPD on 256-bit vectors correctly. Add support for decoding UNPCKHPS/UNPCKHPD for AVX 128-bit and 256-bit forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145055 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -197,16 +197,44 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::UNPCKHPDrm:
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DecodeUNPCKHPMask(2, ShuffleMask);
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DecodeUNPCKHPDMask(2, ShuffleMask);
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Src1Name = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VUNPCKHPDrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VUNPCKHPDrm:
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DecodeUNPCKHPDMask(2, ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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break;
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case X86::VUNPCKHPDYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VUNPCKHPDYrm:
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DecodeUNPCKLPDMask(4, ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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break;
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case X86::UNPCKHPSrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::UNPCKHPSrm:
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DecodeUNPCKHPMask(4, ShuffleMask);
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DecodeUNPCKHPSMask(4, ShuffleMask);
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Src1Name = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VUNPCKHPSrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VUNPCKHPSrm:
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DecodeUNPCKHPSMask(4, ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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break;
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case X86::VUNPCKHPSYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VUNPCKHPSYrm:
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DecodeUNPCKHPSMask(8, ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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break;
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case X86::VPERMILPSri:
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DecodeVPERMILPSMask(4, MI->getOperand(2).getImm(),
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ShuffleMask);
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@ -142,11 +142,32 @@ void DecodeSHUFPSMask(unsigned NElts, unsigned Imm,
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}
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}
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void DecodeUNPCKHPMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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for (unsigned i = 0; i != NElts/2; ++i) {
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ShuffleMask.push_back(i+NElts/2); // Reads from dest
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ShuffleMask.push_back(i+NElts+NElts/2); // Reads from src
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void DecodeUNPCKHPSMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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DecodeUNPCKHPMask(MVT::getVectorVT(MVT::i32, NElts), ShuffleMask);
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}
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void DecodeUNPCKHPDMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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DecodeUNPCKHPMask(MVT::getVectorVT(MVT::i64, NElts), ShuffleMask);
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}
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void DecodeUNPCKHPMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
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unsigned NumElts = VT.getVectorNumElements();
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// Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate
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// independently on 128-bit lanes.
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unsigned NumLanes = VT.getSizeInBits() / 128;
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if (NumLanes == 0 ) NumLanes = 1; // Handle MMX
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unsigned NumLaneElts = NumElts / NumLanes;
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for (unsigned s = 0; s < NumLanes; ++s) {
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unsigned Start = s * NumLaneElts + NumLaneElts/2;
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unsigned End = s * NumLaneElts + NumLaneElts;
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for (unsigned i = Start; i != End; ++i) {
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ShuffleMask.push_back(i); // Reads from dest/src1
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ShuffleMask.push_back(i+NumElts); // Reads from src/src2
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}
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}
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}
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@ -163,8 +184,7 @@ void DecodeUNPCKLPDMask(unsigned NElts,
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/// DecodeUNPCKLPMask - This decodes the shuffle masks for unpcklps/unpcklpd
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/// etc. VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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void DecodeUNPCKLPMask(EVT VT,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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void DecodeUNPCKLPMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
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unsigned NumElts = VT.getVectorNumElements();
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// Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate
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@ -173,16 +193,13 @@ void DecodeUNPCKLPMask(EVT VT,
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if (NumLanes == 0 ) NumLanes = 1; // Handle MMX
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unsigned NumLaneElts = NumElts / NumLanes;
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unsigned Start = 0;
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unsigned End = NumLaneElts / 2;
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for (unsigned s = 0; s < NumLanes; ++s) {
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unsigned Start = s * NumLaneElts;
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unsigned End = s * NumLaneElts + NumLaneElts/2;
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for (unsigned i = Start; i != End; ++i) {
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ShuffleMask.push_back(i); // Reads from dest/src1
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ShuffleMask.push_back(i+NumLaneElts); // Reads from src/src2
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ShuffleMask.push_back(i); // Reads from dest/src1
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ShuffleMask.push_back(i+NumElts); // Reads from src/src2
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}
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// Process the next 128 bits.
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Start += NumLaneElts;
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End += NumLaneElts;
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}
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}
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@ -67,8 +67,16 @@ void DecodePUNPCKHMask(unsigned NElts,
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void DecodeSHUFPSMask(unsigned NElts, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKHPMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKHPSMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKHPDMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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/// DecodeUNPCKHPMask - This decodes the shuffle masks for unpckhps/unpckhpd
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/// etc. VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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void DecodeUNPCKHPMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKLPSMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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@ -79,8 +87,7 @@ void DecodeUNPCKLPDMask(unsigned NElts,
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/// DecodeUNPCKLPMask - This decodes the shuffle masks for unpcklps/unpcklpd
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/// etc. VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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void DecodeUNPCKLPMask(EVT VT,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKLPMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask);
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// DecodeVPERMILPSMask - Decodes VPERMILPS permutes for any 128-bit 32-bit
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@ -4653,7 +4653,7 @@ static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG,
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case X86ISD::UNPCKHPD:
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case X86ISD::VUNPCKHPSY:
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case X86ISD::VUNPCKHPDY:
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DecodeUNPCKHPMask(NumElems, ShuffleMask);
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DecodeUNPCKHPMask(VT, ShuffleMask);
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break;
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case X86ISD::PUNPCKLBW:
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case X86ISD::PUNPCKLWD:
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