mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
get rid of some non-DebugLoc getTargetNode variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63909 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
ea97aa6129
commit
f90b2a7742
@ -683,33 +683,16 @@ public:
|
||||
SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
|
||||
MVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
|
||||
|
||||
SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
|
||||
const SDValue *Ops, unsigned NumOps);
|
||||
SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2,
|
||||
const SDValue *Ops, unsigned NumOps);
|
||||
|
||||
SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2);
|
||||
SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2);
|
||||
|
||||
SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2, SDValue Op3);
|
||||
SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2, SDValue Op3);
|
||||
|
||||
SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
|
||||
const SDValue *Ops, unsigned NumOps);
|
||||
SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3,
|
||||
const SDValue *Ops, unsigned NumOps);
|
||||
|
||||
SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, MVT VT4,
|
||||
const SDValue *Ops, unsigned NumOps);
|
||||
SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3,
|
||||
MVT VT4, const SDValue *Ops, unsigned NumOps);
|
||||
|
||||
SDNode *getTargetNode(unsigned Opcode, const std::vector<MVT> &ResultTys,
|
||||
const SDValue *Ops, unsigned NumOps);
|
||||
SDNode *getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
const std::vector<MVT> &ResultTys, const SDValue *Ops,
|
||||
unsigned NumOps);
|
||||
|
@ -4506,11 +4506,6 @@ SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
|
||||
return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode();
|
||||
}
|
||||
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
const MVT *VTs = getNodeValueTypes(VT1, VT2);
|
||||
return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
|
||||
}
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
MVT VT1, MVT VT2,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
@ -4518,12 +4513,6 @@ SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode();
|
||||
}
|
||||
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2) {
|
||||
const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
|
||||
SDValue Ops[] = { Op1, Op2 };
|
||||
return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
|
||||
}
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2) {
|
||||
@ -4532,13 +4521,6 @@ SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode();
|
||||
}
|
||||
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2,
|
||||
SDValue Op3) {
|
||||
const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
|
||||
SDValue Ops[] = { Op1, Op2, Op3 };
|
||||
return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
|
||||
}
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
MVT VT1, MVT VT2, MVT VT3,
|
||||
SDValue Op1, SDValue Op2,
|
||||
@ -4548,11 +4530,6 @@ SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode();
|
||||
}
|
||||
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
|
||||
return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
|
||||
}
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
MVT VT1, MVT VT2, MVT VT3,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
@ -4560,17 +4537,6 @@ SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
return getNode(~Opcode, dl, VTs, 3, Ops, NumOps).getNode();
|
||||
}
|
||||
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
|
||||
MVT VT2, MVT VT3, MVT VT4,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
std::vector<MVT> VTList;
|
||||
VTList.push_back(VT1);
|
||||
VTList.push_back(VT2);
|
||||
VTList.push_back(VT3);
|
||||
VTList.push_back(VT4);
|
||||
const MVT *VTs = getNodeValueTypes(VTList);
|
||||
return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
|
||||
}
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
|
||||
MVT VT2, MVT VT3, MVT VT4,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
@ -4583,13 +4549,6 @@ SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
|
||||
return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode();
|
||||
}
|
||||
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
|
||||
const std::vector<MVT> &ResultTys,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
const MVT *VTs = getNodeValueTypes(ResultTys);
|
||||
return getNode(~Opcode, VTs, ResultTys.size(),
|
||||
Ops, NumOps).getNode();
|
||||
}
|
||||
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
|
||||
const std::vector<MVT> &ResultTys,
|
||||
const SDValue *Ops, unsigned NumOps) {
|
||||
|
@ -717,7 +717,8 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
|
||||
cast<ConstantSDNode>(N2)->getZExtValue()),
|
||||
MVT::i32);
|
||||
SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag };
|
||||
SDNode *ResNode = CurDAG->getTargetNode(Opc, MVT::Other, MVT::Flag, Ops, 5);
|
||||
SDNode *ResNode = CurDAG->getTargetNode(Opc, dl, MVT::Other,
|
||||
MVT::Flag, Ops, 5);
|
||||
Chain = SDValue(ResNode, 0);
|
||||
if (Op.getNode()->getNumValues() == 2) {
|
||||
InFlag = SDValue(ResNode, 1);
|
||||
|
@ -158,6 +158,7 @@ InstructionSelect() {
|
||||
|
||||
SDNode *XCoreDAGToDAGISel::Select(SDValue Op) {
|
||||
SDNode *N = Op.getNode();
|
||||
DebugLoc dl = N->getDebugLoc();
|
||||
MVT NVT = N->getValueType(0);
|
||||
if (NVT == MVT::i32) {
|
||||
switch (N->getOpcode()) {
|
||||
@ -165,26 +166,27 @@ SDNode *XCoreDAGToDAGISel::Select(SDValue Op) {
|
||||
case ISD::Constant: {
|
||||
if (Predicate_immMskBitp(N)) {
|
||||
SDValue MskSize = Transform_msksize_xform(N);
|
||||
return CurDAG->getTargetNode(XCore::MKMSK_rus, MVT::i32, MskSize);
|
||||
return CurDAG->getTargetNode(XCore::MKMSK_rus, dl, MVT::i32, MskSize);
|
||||
}
|
||||
else if (! Predicate_immU16(N)) {
|
||||
unsigned Val = cast<ConstantSDNode>(N)->getZExtValue();
|
||||
SDValue CPIdx =
|
||||
CurDAG->getTargetConstantPool(ConstantInt::get(Type::Int32Ty, Val),
|
||||
TLI.getPointerTy());
|
||||
return CurDAG->getTargetNode(XCore::LDWCP_lru6, MVT::i32, MVT::Other,
|
||||
CPIdx, CurDAG->getEntryNode());
|
||||
return CurDAG->getTargetNode(XCore::LDWCP_lru6, dl, MVT::i32,
|
||||
MVT::Other, CPIdx,
|
||||
CurDAG->getEntryNode());
|
||||
}
|
||||
break;
|
||||
}
|
||||
case ISD::SMUL_LOHI: {
|
||||
// FIXME fold addition into the macc instruction
|
||||
if (!Subtarget.isXS1A()) {
|
||||
SDValue Zero(CurDAG->getTargetNode(XCore::LDC_ru6, MVT::i32,
|
||||
SDValue Zero(CurDAG->getTargetNode(XCore::LDC_ru6, dl, MVT::i32,
|
||||
CurDAG->getTargetConstant(0, MVT::i32)), 0);
|
||||
SDValue Ops[] = { Zero, Zero, Op.getOperand(0), Op.getOperand(1) };
|
||||
SDNode *ResNode = CurDAG->getTargetNode(XCore::MACCS_l4r, MVT::i32,
|
||||
MVT::i32, Ops, 4);
|
||||
SDNode *ResNode = CurDAG->getTargetNode(XCore::MACCS_l4r, dl,
|
||||
MVT::i32, MVT::i32, Ops, 4);
|
||||
ReplaceUses(SDValue(N, 0), SDValue(ResNode, 1));
|
||||
ReplaceUses(SDValue(N, 1), SDValue(ResNode, 0));
|
||||
return NULL;
|
||||
@ -193,11 +195,11 @@ SDNode *XCoreDAGToDAGISel::Select(SDValue Op) {
|
||||
}
|
||||
case ISD::UMUL_LOHI: {
|
||||
// FIXME fold addition into the macc / lmul instruction
|
||||
SDValue Zero(CurDAG->getTargetNode(XCore::LDC_ru6, MVT::i32,
|
||||
SDValue Zero(CurDAG->getTargetNode(XCore::LDC_ru6, dl, MVT::i32,
|
||||
CurDAG->getTargetConstant(0, MVT::i32)), 0);
|
||||
SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
|
||||
Zero, Zero };
|
||||
SDNode *ResNode = CurDAG->getTargetNode(XCore::LMUL_l6r, MVT::i32,
|
||||
SDNode *ResNode = CurDAG->getTargetNode(XCore::LMUL_l6r, dl, MVT::i32,
|
||||
MVT::i32, Ops, 4);
|
||||
ReplaceUses(SDValue(N, 0), SDValue(ResNode, 1));
|
||||
ReplaceUses(SDValue(N, 1), SDValue(ResNode, 0));
|
||||
@ -207,7 +209,7 @@ SDNode *XCoreDAGToDAGISel::Select(SDValue Op) {
|
||||
if (!Subtarget.isXS1A()) {
|
||||
SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
|
||||
Op.getOperand(2) };
|
||||
return CurDAG->getTargetNode(XCore::LADD_l5r, MVT::i32, MVT::i32,
|
||||
return CurDAG->getTargetNode(XCore::LADD_l5r, dl, MVT::i32, MVT::i32,
|
||||
Ops, 3);
|
||||
}
|
||||
break;
|
||||
@ -216,7 +218,7 @@ SDNode *XCoreDAGToDAGISel::Select(SDValue Op) {
|
||||
if (!Subtarget.isXS1A()) {
|
||||
SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
|
||||
Op.getOperand(2) };
|
||||
return CurDAG->getTargetNode(XCore::LSUB_l5r, MVT::i32, MVT::i32,
|
||||
return CurDAG->getTargetNode(XCore::LSUB_l5r, dl, MVT::i32, MVT::i32,
|
||||
Ops, 3);
|
||||
}
|
||||
break;
|
||||
|
Loading…
Reference in New Issue
Block a user