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InstCombine: Flip the order of two urem transforms
There are two transforms in visitUrem that conflict with each other. *) One, if a divisor is a power of two, subtracts one from the divisor and turns it into a bitwise-and. *) The other unwraps both operands if they are surrounded by zext instructions. Flipping the order allows the subtraction to go beneath the sign extension. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181668 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1027,6 +1027,12 @@ Instruction *InstCombiner::visitURem(BinaryOperator &I) {
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if (Instruction *common = commonIRemTransforms(I))
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return common;
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// (zext A) urem (zext B) --> zext (A urem B)
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if (ZExtInst *ZOp0 = dyn_cast<ZExtInst>(Op0))
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if (Value *ZOp1 = dyn_castZExtVal(Op1, ZOp0->getSrcTy()))
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return new ZExtInst(Builder->CreateURem(ZOp0->getOperand(0), ZOp1),
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I.getType());
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// X urem Y -> X and Y-1, where Y is a power of 2,
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if (isKnownToBeAPowerOfTwo(Op1, /*OrZero*/true)) {
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Constant *N1 = Constant::getAllOnesValue(I.getType());
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@ -1034,12 +1040,6 @@ Instruction *InstCombiner::visitURem(BinaryOperator &I) {
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return BinaryOperator::CreateAnd(Op0, Add);
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}
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// (zext A) urem (zext B) --> zext (A urem B)
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if (ZExtInst *ZOp0 = dyn_cast<ZExtInst>(Op0))
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if (Value *ZOp1 = dyn_castZExtVal(Op1, ZOp0->getSrcTy()))
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return new ZExtInst(Builder->CreateURem(ZOp0->getOperand(0), ZOp1),
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I.getType());
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return 0;
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}
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@ -135,3 +135,17 @@ define i64 @test14(i64 %x, i32 %y) {
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%urem = urem i64 %x, %zext
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ret i64 %urem
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}
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define i64 @test15(i32 %x, i32 %y) {
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; CHECK: @test15
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; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, %y
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SHL]], -1
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD]], %x
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[AND]] to i64
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; CHECK-NEXT: ret i64 [[ZEXT]]
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%shl = shl i32 1, %y
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%zext0 = zext i32 %shl to i64
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%zext1 = zext i32 %x to i64
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%urem = urem i64 %zext1, %zext0
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ret i64 %urem
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}
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