6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-18 12:29:27 +00:00
Code Issues Projects Releases Wiki Activity

Special LDR instructions to load from non-pc-relative constantpools. These are

Browse Source 
rematerializable. Only used for constant generation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-03-19 07:20:03 +00:00
parent a251570417
commit fa775d09c6
3 changed files with 12 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -551,7 +551,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
SDNode *ResNode;
if (Subtarget->isThumb())
ResNode = CurDAG->getTargetNode(ARM::tLDRpci, MVT::i32, MVT::Other,
ResNode = CurDAG->getTargetNode(ARM::tLDRcp, MVT::i32, MVT::Other,
CPIdx, CurDAG->getEntryNode());
else {
SDOperand Ops[] = {
@ -560,7 +560,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
CurDAG->getTargetConstant(0, MVT::i32),
CurDAG->getEntryNode()
};
ResNode = CurDAG->getTargetNode(ARM::LDR, MVT::i32, MVT::Other, Ops, 4);
ResNode=CurDAG->getTargetNode(ARM::LDRcp, MVT::i32, MVT::Other, Ops, 4);
}
ReplaceUses(Op, SDOperand(ResNode, 0));
return NULL;

5
lib/Target/ARM/ARMInstrInfo.td
View File

@ -580,6 +580,11 @@ def LDR : AI2<(ops GPR:$dst, addrmode2:$addr),
"ldr $dst, $addr",
[(set GPR:$dst, (load addrmode2:$addr))]>;
// Special LDR for loads from non-pc-relative constpools.
let isReMaterializable = 1 in
def LDRcp : AI2<(ops GPR:$dst, addrmode2:$addr),
"ldr $dst, $addr", []>;
// Loads with zero extension
def LDRH : AI3<(ops GPR:$dst, addrmode3:$addr),
"ldrh $dst, $addr",

5
lib/Target/ARM/ARMInstrThumb.td
View File

@ -248,6 +248,11 @@ def tRestore : TIs<(ops GPR:$dst, t_addrmode_sp:$addr),
def tLDRpci : TIs<(ops GPR:$dst, i32imm:$addr),
"ldr $dst, $addr",
[(set GPR:$dst, (load (ARMWrapper tconstpool:$addr)))]>;
// Special LDR for loads from non-pc-relative constpools.
let isReMaterializable = 1 in
def tLDRcp : TIs<(ops GPR:$dst, i32imm:$addr),
"ldr $dst, $addr", []>;
} // isLoad
let isStore = 1 in {