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Special LDR instructions to load from non-pc-relative constantpools. These are
rematerializable. Only used for constant generation for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -551,7 +551,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
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SDNode *ResNode;
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SDNode *ResNode;
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if (Subtarget->isThumb())
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if (Subtarget->isThumb())
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ResNode = CurDAG->getTargetNode(ARM::tLDRpci, MVT::i32, MVT::Other,
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ResNode = CurDAG->getTargetNode(ARM::tLDRcp, MVT::i32, MVT::Other,
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CPIdx, CurDAG->getEntryNode());
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CPIdx, CurDAG->getEntryNode());
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else {
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else {
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SDOperand Ops[] = {
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SDOperand Ops[] = {
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@ -560,7 +560,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
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CurDAG->getTargetConstant(0, MVT::i32),
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CurDAG->getTargetConstant(0, MVT::i32),
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CurDAG->getEntryNode()
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CurDAG->getEntryNode()
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};
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};
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ResNode = CurDAG->getTargetNode(ARM::LDR, MVT::i32, MVT::Other, Ops, 4);
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ResNode=CurDAG->getTargetNode(ARM::LDRcp, MVT::i32, MVT::Other, Ops, 4);
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}
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}
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ReplaceUses(Op, SDOperand(ResNode, 0));
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ReplaceUses(Op, SDOperand(ResNode, 0));
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return NULL;
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return NULL;
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@ -580,6 +580,11 @@ def LDR : AI2<(ops GPR:$dst, addrmode2:$addr),
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"ldr $dst, $addr",
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"ldr $dst, $addr",
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[(set GPR:$dst, (load addrmode2:$addr))]>;
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[(set GPR:$dst, (load addrmode2:$addr))]>;
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// Special LDR for loads from non-pc-relative constpools.
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let isReMaterializable = 1 in
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def LDRcp : AI2<(ops GPR:$dst, addrmode2:$addr),
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"ldr $dst, $addr", []>;
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// Loads with zero extension
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// Loads with zero extension
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def LDRH : AI3<(ops GPR:$dst, addrmode3:$addr),
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def LDRH : AI3<(ops GPR:$dst, addrmode3:$addr),
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"ldrh $dst, $addr",
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"ldrh $dst, $addr",
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@ -248,6 +248,11 @@ def tRestore : TIs<(ops GPR:$dst, t_addrmode_sp:$addr),
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def tLDRpci : TIs<(ops GPR:$dst, i32imm:$addr),
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def tLDRpci : TIs<(ops GPR:$dst, i32imm:$addr),
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"ldr $dst, $addr",
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"ldr $dst, $addr",
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[(set GPR:$dst, (load (ARMWrapper tconstpool:$addr)))]>;
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[(set GPR:$dst, (load (ARMWrapper tconstpool:$addr)))]>;
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// Special LDR for loads from non-pc-relative constpools.
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let isReMaterializable = 1 in
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def tLDRcp : TIs<(ops GPR:$dst, i32imm:$addr),
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"ldr $dst, $addr", []>;
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} // isLoad
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} // isLoad
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let isStore = 1 in {
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let isStore = 1 in {
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