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Fix LSR to tolerate cases where ScalarEvolution initially
misses an opportunity to fold add operands, but folds them after LSR has separated them out. This fixes rdar://7886751. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102157 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -16,3 +16,15 @@ In addition to being much more complicated, it involves i65 arithmetic,
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which is very inefficient when expanded into code.
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//===---------------------------------------------------------------------===//
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In test/CodeGen/X86/lsr-delayed-fold.ll,
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ScalarEvolution is forming this expression:
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((trunc i64 (-1 * %arg5) to i32) + (trunc i64 %arg5 to i32) + (-1 * (trunc i64 undef to i32)))
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This could be folded to
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(-1 * (trunc i64 undef to i32))
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//===---------------------------------------------------------------------===//
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@ -2060,8 +2060,11 @@ void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
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LU.Kind, LU.AccessTy, TLI, SE))
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continue;
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const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
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if (InnerSum->isZero())
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continue;
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Formula F = Base;
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F.BaseRegs[i] = SE.getAddExpr(InnerAddOps);
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F.BaseRegs[i] = InnerSum;
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F.BaseRegs.push_back(*J);
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if (InsertFormula(LU, LUIdx, F))
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// If that formula hadn't been seen before, recurse to find more like
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28
test/CodeGen/X86/lsr-delayed-fold.ll
Normal file
28
test/CodeGen/X86/lsr-delayed-fold.ll
Normal file
@ -0,0 +1,28 @@
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; RUN: llc -march=x86-64 < %s > /dev/null
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; rdar://7886751
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; ScalarEvolution misses an opportunity to fold ((trunc x) + (trunc -x) + y),
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; but LSR should tolerate this.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin11.0"
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define fastcc void @formatValue(i64 %arg5) nounwind {
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bb12: ; preds = %bb11
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%t = trunc i64 %arg5 to i32 ; <i32> [#uses=1]
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%t13 = sub i64 0, %arg5 ; <i64> [#uses=1]
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%t14 = and i64 %t13, 4294967295 ; <i64> [#uses=1]
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br label %bb15
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bb15: ; preds = %bb21, %bb12
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%t16 = phi i64 [ 0, %bb12 ], [ %t23, %bb15 ] ; <i64> [#uses=2]
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%t17 = mul i64 %t14, %t16 ; <i64> [#uses=1]
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%t18 = add i64 undef, %t17 ; <i64> [#uses=1]
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%t19 = trunc i64 %t18 to i32 ; <i32> [#uses=1]
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%t22 = icmp eq i32 %t19, %t ; <i1> [#uses=1]
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%t23 = add i64 %t16, 1 ; <i64> [#uses=1]
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br i1 %t22, label %bb24, label %bb15
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bb24: ; preds = %bb21, %bb11
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unreachable
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}
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