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Don't cache the instruction and register info from the TargetMachine, because

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the internals of TargetMachine could change.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183567 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2013-06-07 20:42:15 +00:00
parent 3ff0abfaab
commit fc61b6f111
4 changed files with 10 additions and 8 deletions
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2
lib/Target/SystemZ/SystemZInstrInfo.cpp
View File

@ -23,7 +23,7 @@ using namespace llvm;
SystemZInstrInfo::SystemZInstrInfo(SystemZTargetMachine &tm)
: SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
RI(tm, *this) {
RI(tm) {
}
// MI is a 128-bit load or store. Split it into two 64-bit loads or stores,

4
lib/Target/SystemZ/SystemZLongBranch.cpp
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@ -133,8 +133,7 @@ namespace {
public:
static char ID;
SystemZLongBranch(const SystemZTargetMachine &tm)
: MachineFunctionPass(ID),
TII(static_cast<const SystemZInstrInfo *>(tm.getInstrInfo())) {}
: MachineFunctionPass(ID), TII(0) {}
virtual const char *getPassName() const {
return "SystemZ Long Branch";
@ -402,6 +401,7 @@ void SystemZLongBranch::relaxBranches() {
}
bool SystemZLongBranch::runOnMachineFunction(MachineFunction &F) {
TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo());
MF = &F;
uint64_t Size = initMBBInfo();
if (Size <= MaxForwardRange || !mustRelaxABranch())

9
lib/Target/SystemZ/SystemZRegisterInfo.cpp
View File

@ -17,9 +17,8 @@
using namespace llvm;
SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
const SystemZInstrInfo &tii)
: SystemZGenRegisterInfo(SystemZ::R14D), TM(tm), TII(tii) {}
SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm)
: SystemZGenRegisterInfo(SystemZ::R14D), TM(tm) {}
const uint16_t*
SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
@ -61,6 +60,8 @@ SystemZRegisterInfo::saveScavengerRegister(MachineBasicBlock &MBB,
const TargetRegisterClass *RC,
unsigned Reg) const {
MachineFunction &MF = *MBB.getParent();
const SystemZInstrInfo &TII =
*static_cast<const SystemZInstrInfo*>(TM.getInstrInfo());
const SystemZFrameLowering *TFI =
static_cast<const SystemZFrameLowering *>(TM.getFrameLowering());
unsigned Base = getFrameRegister(MF);
@ -86,6 +87,8 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
MachineBasicBlock &MBB = *MI->getParent();
MachineFunction &MF = *MBB.getParent();
const SystemZInstrInfo &TII =
*static_cast<const SystemZInstrInfo*>(TM.getInstrInfo());
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
DebugLoc DL = MI->getDebugLoc();

3
lib/Target/SystemZ/SystemZRegisterInfo.h
View File

@ -35,10 +35,9 @@ class SystemZInstrInfo;
struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
private:
SystemZTargetMachine &TM;
const SystemZInstrInfo &TII;
public:
SystemZRegisterInfo(SystemZTargetMachine &tm, const SystemZInstrInfo &tii);
SystemZRegisterInfo(SystemZTargetMachine &tm);
// Override TargetRegisterInfo.h.
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const