6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-21 18:29:46 +00:00
Code Issues Projects Releases Wiki Activity

Switch to LLVM support function abs64 to keep VS2008 happy.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178141 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2013-03-27 13:15:08 +00:00
parent f647052d5f
commit fe37e6279e
2 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/AArch64/AArch64InstrInfo.cpp
View File

@ -618,11 +618,11 @@ void llvm::emitRegUpdate(MachineBasicBlock &MBB,
int64_t NumBytes, MachineInstr::MIFlag MIFlags) {
if (NumBytes == 0 && DstReg == SrcReg)
return;
else if (abs(NumBytes) & ~0xffffff) {
else if (abs64(NumBytes) & ~0xffffff) {
// Generically, we have to materialize the offset into a temporary register
// and subtract it. There are a couple of ways this could be done, for now
// we'll use a movz/movk or movn/movk sequence.
uint64_t Bits = static_cast<uint64_t>(abs(NumBytes));
uint64_t Bits = static_cast<uint64_t>(abs64(NumBytes));
BuildMI(MBB, MBBI, dl, TII.get(AArch64::MOVZxii), ScratchReg)
.addImm(0xffff & Bits).addImm(0)
.setMIFlags(MIFlags);
@ -673,7 +673,7 @@ void llvm::emitRegUpdate(MachineBasicBlock &MBB,
} else {
LowOp = AArch64::SUBxxi_lsl0_s;
HighOp = AArch64::SUBxxi_lsl12_s;
NumBytes = abs(NumBytes);
NumBytes = abs64(NumBytes);
}
// If we're here, at the very least a move needs to be produced, which just

2
lib/Target/Hexagon/HexagonHardwareLoops.cpp
View File

@ -701,7 +701,7 @@ CountValue *HexagonHardwareLoops::computeCount(MachineLoop *Loop,
// If the induction variable bump is not a power of 2, quit.
// Othwerise we'd need a general integer division.
if (!isPowerOf2_64(abs(IVBump)))
if (!isPowerOf2_64(abs64(IVBump)))
return 0;
MachineBasicBlock *PH = Loop->getLoopPreheader();