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[x86] Added _addcarry_ and _subborrow_ intrinsics

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216164 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Robert Khasanov 2014-08-21 09:43:43 +00:00
parent 375a68ca15
commit fec1abaeab
3 changed files with 72 additions and 1 deletions
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12
include/llvm/IR/IntrinsicsX86.td
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@ -2768,6 +2768,18 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_addcarryx_u64: GCCBuiltin<"__builtin_ia32_addcarryx_u64">,
Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
llvm_ptr_ty], [IntrReadWriteArgMem]>;
def int_x86_addcarry_u32: GCCBuiltin<"__builtin_ia32_addcarry_u32">,
Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty,
llvm_ptr_ty], [IntrReadWriteArgMem]>;
def int_x86_addcarry_u64: GCCBuiltin<"__builtin_ia32_addcarry_u64">,
Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
llvm_ptr_ty], [IntrReadWriteArgMem]>;
def int_x86_subborrow_u32: GCCBuiltin<"__builtin_ia32_subborrow_u32">,
Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty,
llvm_ptr_ty], [IntrReadWriteArgMem]>;
def int_x86_subborrow_u64: GCCBuiltin<"__builtin_ia32_subborrow_u64">,
Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
llvm_ptr_ty], [IntrReadWriteArgMem]>;
}
//===----------------------------------------------------------------------===//

10
lib/Target/X86/X86ISelLowering.cpp
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@ -15455,6 +15455,14 @@ static void InitIntinsicsMap() {
IntrinsicData(ADX, X86ISD::ADC, 0)));
IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u64,
IntrinsicData(ADX, X86ISD::ADC, 0)));
IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u32,
IntrinsicData(ADX, X86ISD::ADC, 0)));
IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u64,
IntrinsicData(ADX, X86ISD::ADC, 0)));
IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u32,
IntrinsicData(ADX, X86ISD::SBB, 0)));
IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u64,
IntrinsicData(ADX, X86ISD::SBB, 0)));
Initialized = true;
}
@ -15547,7 +15555,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget *Subtarget,
return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(),
Ret, SDValue(InTrans.getNode(), 1));
}
// ADC/ADCX
// ADC/ADCX/SBB
case ADX: {
SmallVector<SDValue, 2> Results;
SDVTList CFVTs = DAG.getVTList(Op->getValueType(0), MVT::Other);

51
test/CodeGen/X86/adx-intrinsics.ll
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@ -1,3 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 --show-mc-encoding| FileCheck %s --check-prefix=NOADX --check-prefix=CHECK
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell --show-mc-encoding| FileCheck %s --check-prefix=ADX --check-prefix=CHECK
declare i8 @llvm.x86.addcarryx.u32(i8, i32, i32, i8*)
@ -24,3 +25,53 @@ define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) {
ret i8 %ret;
}
declare i8 @llvm.x86.addcarry.u32(i8, i32, i32, i8*)
define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) {
; CHECK-LABEL: test_addcarry_u32
; CHECK: addb
; ADX: adcxl
; NOADX: adcl
; CHECK: setb
; CHECK: retq
%ret = tail call i8 @llvm.x86.addcarry.u32(i8 %c, i32 %a, i32 %b, i8* %ptr)
ret i8 %ret;
}
declare i8 @llvm.x86.addcarry.u64(i8, i64, i64, i8*)
define i8 @test_addcarry_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) {
; CHECK-LABEL: test_addcarry_u64
; CHECK: addb
; ADX: adcxq
; NOADX: adcq
; CHECK: setb
; CHECK: retq
%ret = tail call i8 @llvm.x86.addcarry.u64(i8 %c, i64 %a, i64 %b, i8* %ptr)
ret i8 %ret;
}
declare i8 @llvm.x86.subborrow.u32(i8, i32, i32, i8*)
define i8 @test_subborrow_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) {
; CHECK-LABEL: test_subborrow_u32
; CHECK: addb
; CHECK: sbbl
; CHECK: setb
; CHECK: retq
%ret = tail call i8 @llvm.x86.subborrow.u32(i8 %c, i32 %a, i32 %b, i8* %ptr)
ret i8 %ret;
}
declare i8 @llvm.x86.subborrow.u64(i8, i64, i64, i8*)
define i8 @test_subborrow_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) {
; CHECK-LABEL: test_subborrow_u64
; CHECK: addb
; CHECK: sbbq
; CHECK: setb
; CHECK: retq
%ret = tail call i8 @llvm.x86.subborrow.u64(i8 %c, i64 %a, i64 %b, i8* %ptr)
ret i8 %ret;
}