Commit Graph

81839 Commits

Author SHA1 Message Date
Damián Silvani f6cfc7d588 Replace namespace SP for M6502 2015-08-03 20:10:07 -03:00
Damián Silvani d436bd8dc8 Add missing switch case for mos6502 2015-08-03 18:48:43 -03:00
Damián Silvani 964a041a08 Eliminate big-endian subtargets of Mos6502
They were copied from SPARC V8 and V9.
2015-08-03 17:13:53 -03:00
Damián Silvani 36ee8fe697 Register Mos6502 target
Also add mos6502 subtargets on Triple class
2015-08-02 22:47:30 -03:00
Damián Silvani 642eccbb21 Clone "Sparc" target as "Mos6502"
All string occurences for "sparc", "Sparc" and "SPARC" were already
replaced, with the exception of ELF constans in the object file
descriptor as it will get removed later on (we won't be building ELF
object files for the 6502).
2015-08-02 22:45:53 -03:00
Duncan P. N. Exon Smith 94404e8097 AsmPrinter: Split out non-DIE printing from DIE::print(), NFC
Split out a helper `printValues()` for printing `DIEBlock` and `DIELoc`,
instead of relying on `DIE::print()`.  The shared code was actually
fairly small there.  No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243856 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-02 20:46:49 +00:00
Duncan P. N. Exon Smith 69e4c2fc86 AsmPrinter: Take DIEValueList in some DwarfUnit API, NFC
Take `DIEValueList` instead of `DIE` so that `DIEBlock` and `DIELoc` can
stop inheriting from `DIE` in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-02 20:44:46 +00:00
Duncan P. N. Exon Smith bc3c2c319c AsmPrinter: Change DIEValueList to a subclass of DIE, NFC
Rewrite `DIEValueList` as a subclass of `DIE`, renaming its API to match
`DIE`'s.  This is preparation for changing `DIEBlock` and `DIELoc` to
stop inheriting from `DIE` and inherit directly from `DIEValueList`.

I thought about leaving this as a has-a relationship (and changing
`DIELoc` and `DIEBlock` to also have-a `DIEValueList`), but that seemed
to require a fair bit more boilerplate and I think it needed more
changes to the `DwarfUnit` API than this will.

No functionality change intended here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-02 20:42:45 +00:00
Andrew Wilkins 510a661596 Add support to set/get ordering for load/store from the C API
Summary: As per title

Reviewers: chandlerc, bogner, majnemer, axw

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11141

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243847 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-02 12:16:57 +00:00
Craig Topper f03f83cfc0 Mark CompositeType::getTypeAtIndex as const. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243845 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 22:52:12 +00:00
Craig Topper 55afc08759 Mark Type::getPointerTo as const. Unfortunately, this requires a const_cast inside, but at least it makes all methods on Type const. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 22:20:31 +00:00
Craig Topper e0582480a4 Merge the const and non-const Type::getScalarType to a const version that returns a non-const pointer. Since we don't put const on Types all places were already calling the non-const version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243843 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 22:20:27 +00:00
Craig Topper 84bbcfe200 De-constify pointers to Type since they can't be modified. NFC
This was already done in most places a while ago. This just fixes the ones that crept in over time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 22:20:21 +00:00
Jingyue Wu 6ebf387fdd [NVPTX] allow register copy between float and int
Summary:
Fixes PR24303. With Bruno's WIP (D11197) on PeepholeOptimizer, across-class
register copying (e.g. i32 to f32) becomes possible. Enhance
NVPTXInstrInfo::copyPhysReg to handle these cases.

Reviewers: jholewinski

Subscribers: eliben, jholewinski, llvm-commits, bruno

Differential Revision: http://reviews.llvm.org/D11622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243839 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 18:02:12 +00:00
Simon Pilgrim 93ed1b3388 Remove trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243838 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 17:06:47 +00:00
Simon Pilgrim c87d0b570d Use SDValue bool check. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 17:05:50 +00:00
Simon Pilgrim fa2c240c15 [DAGCombiner] Convert constant AND masks to shuffle clear masks down to the byte level
The XformToShuffleWithZero method currently checks AND masks at the per-lane level for all-one and all-zero constants and attempts to convert them to legal shuffle clear masks.

This patch generalises XformToShuffleWithZero, splitting and checking the sub-lanes of the constants down to the byte level to see if any legal shuffle clear masks are possible. This allows a lot of masks (often from legalization or truncation) to be folded into existing shuffle patterns and removes a lot of constant mask loading.

There are a few examples of poor shuffle lowering that are exposed by this patch that will be cleaned up in future patches (e.g. merging shuffles that are separated by bitcasts, x86 legalized v8i8 zero extension uses PMOVZX+AND+AND instead of AND+PMOVZX, etc.)

Differential Revision: http://reviews.llvm.org/D11518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 10:01:46 +00:00
David Blaikie b80eede641 -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
Remove some unnecessary explicit special members in Hexagon that, once
removed, allow the other implicit special members to be used without
depending on deprecated features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 05:31:27 +00:00
David Blaikie 3d171d4f73 -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243824 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 05:10:40 +00:00
JF Bastien e428ba798e WebAssembly: handle more than int32 argument/return
Summary: Also test 64-bit integers, except shifts for now which are broken because isel dislikes the 32-bit truncate that precedes them.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11699

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243822 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 04:48:44 +00:00
David Blaikie 299ab3d150 -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
Various targets use std::swap on specific MCAsmOperands (ARM and
possibly Hexagon as well). It might be helpful to mark those subclasses
as final, to ensure that the availability of move/copy operations can't
lead to slicing. (same sort of requirements as the non-vitual dtor -
protected or a final class)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243820 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 04:40:41 +00:00
Kostya Serebryany 0dd9ec77d1 [libFuzzer] more refactoring of the Mutator and adding tests to it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243818 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 02:23:06 +00:00
Kostya Serebryany 8d4c8061c9 [libFuzzer] start refactoring the Mutator and adding tests to it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243817 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 01:42:51 +00:00
Alex Lorenz f5cf675376 AMDGPU/SI: Add implicit register operands in the correct order.
This commit fixes a bug in the class 'SIInstrInfo' where the implicit register
machine operands were added to a machine instruction in an incorrect order -
the implicit uses were added before the implicit defs.

I found this bug while working on moving the implicit register operand
verification code from the MIR parser to the machine verifier.

This commit also makes the method 'addImplicitDefUseOperands' in the machine
instruction class public so that it can be reused in the 'SIInstrInfo' class.

Reviewers: Matt Arsenault

Differential Revision: http://reviews.llvm.org/D11689


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 23:30:09 +00:00
Alex Lorenz c198b23a4d MIR Parser: Report an error when a jump table entry is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243798 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 23:13:23 +00:00
Alex Lorenz faa33cdc3c MIR Parser: Remove unused variable.
This variable is unused as of r243572.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 22:59:20 +00:00
Kostya Serebryany 427b5a50cf [libFuzzer] limit the size of the inputs printed to stderr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243795 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 22:07:17 +00:00
Jingyue Wu bd11ccb2b9 [NVPTX] convert pointers in byval kernel arguments to global
Summary:
For example, in

  struct S {
    int *x;
    int *y;
  };
  __global__ void foo(S s) {
    int *b = s.y;
    // use b
  }

"b" is guaranteed to point to global. NVPTX should emit ld.global/st.global for
accessing "b".

Reviewers: jholewinski

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11505

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 21:44:14 +00:00
David Blaikie 4c20864f94 -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 21:37:09 +00:00
JF Bastien caf175c28c WebAssembly: handle `ret void`.
Summary:
Use -1 as numoperands for the return SDTypeProfile, denoting that return is variadic. Note that the patterns in InstrControl.td still need to match the inputs, so this ins't an "anything goes" variadic on ret!

The next step will be to handle other local types (not just int32).

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11692

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243783 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 21:04:18 +00:00
Kostya Serebryany f7aa7e6f49 [libFuzzer] make sure that 2-byte arguments of switch() are handled properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243781 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 20:58:55 +00:00
Alex Lorenz c225eda1f1 MIR Serialization: Serialize the floating point immediate machine operands.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 20:49:21 +00:00
Frederic Riss 09e26a42d2 [dwarfdump] Ignore scattered relocations for mach-o.
When encountering a scattered relocation, the code would assert trying to
access an unexisting section. I couldn't find a way to expose the result
of the processing of a scattered reloc, and I'm really unsure what the
right thing to do is. This patch just skips them during the processing in
DwarfContext and adds a mach-o file to the tests that exposed the asserting
behavior.
(This is a new failure that is being exposed by Rafael's recent work on
the libObject interfaces. I think the wrong behavior has always happened,
but now it's asserting)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 20:22:50 +00:00
Duncan P. N. Exon Smith bf2040f00c DI: Remove DW_TAG_arg_variable and DW_TAG_auto_variable
Remove the fake `DW_TAG_auto_variable` and `DW_TAG_arg_variable` tags,
using `DW_TAG_variable` in their place Stop exposing the `tag:` field at
all in the assembly format for `DILocalVariable`.

Most of the testcase updates were generated by the following sed script:

    find test/ -name "*.ll" -o -name "*.mir" |
    xargs grep -l 'DILocalVariable' |
    xargs sed -i '' \
      -e 's/tag: DW_TAG_arg_variable, //' \
      -e 's/tag: DW_TAG_auto_variable, //'

There were only a handful of tests in `test/Assembly` that I needed to
update by hand.

(Note: a follow-up could change `DILocalVariable::DILocalVariable()` to
set the tag to `DW_TAG_formal_parameter` instead of `DW_TAG_variable`
(as appropriate), instead of having that logic magically in the backend
in `DbgVariable`.  I've added a FIXME to that effect.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 18:58:39 +00:00
JF Bastien 48db91bcc3 x86: check hasOpaqueSPAdjustment in canRealignStack
Summary:
@rnk pointed out in [1] that x86's canRealignStack logic should match that in CantUseSP from hasBasePointer.

  [1]: http://reviews.llvm.org/D11160?id=29713#inline-89350

Reviewers: rnk

Subscribers: rnk, llvm-commits

Differential Revision: http://reviews.llvm.org/D11377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243772 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 18:28:09 +00:00
JF Bastien 6877df25a0 WebAssembly: handle unused function arguments.
Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243770 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 18:13:27 +00:00
Kostya Serebryany 207cfe14a9 [libFuzzer] record traces from the switch statements only when told to do so
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243768 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 18:09:08 +00:00
David Majnemer 4a45f0871a New EH representation for MSVC compatibility
This introduces new instructions neccessary to implement MSVC-compatible
exception handling support.  Most of the middle-end and none of the
back-end haven't been audited or updated to take them into account.

Differential Revision: http://reviews.llvm.org/D11097

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243766 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:58:14 +00:00
Duncan P. N. Exon Smith aa50fa7c2f DI: Rewrite the DIBuilder local variable API
Replace the general `createLocalVariable()` with two more specific
functions: `createParameterVariable()` and `createAutoVariable()`, and
rewrite the documentation.

Besides cleaning up the API, this avoids exposing the fake DWARF tags
`DW_TAG_arg_variable` and `DW_TAG_auto_variable` to frontends, and is
preparation for removing them completely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243764 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:55:53 +00:00
JF Bastien 3f2cb5c959 WebAssembly: print basic integer assembly.
Summary:
This prints assembly for int32 integer operations defined in WebAssemblyInstrInteger.td only, with major caveats:

  - The operation names are currently incorrect.
  - Other integer and floating-point types will be added later.
  - The printer isn't factored out to handle recursive AST code yet, since it can't even handle control flow anyways.
  - The assembly format isn't full s-expressions yet either, this will be added later.
  - This currently disables PrologEpilogCodeInserter as well as MachineCopyPropagation becasue they don't like virtual registers, which WebAssembly likes quite a bit. This will be fixed by factoring out NVPTX's change (currently a fork of PrologEpilogCodeInserter).

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11671

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243763 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:53:38 +00:00
David Majnemer 0229c3b7ad [COFF] Consider the ImageBase when reporting section addresses
This lets us reenable the lld test disabled in r243758.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243761 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:40:24 +00:00
Kostya Serebryany 26e09e2da5 [libFuzzer] support switch interception in dfsan mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243760 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:05:05 +00:00
Benjamin Kramer 3973e4b71b [CodeGenPrepare] Compress a pair. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243759 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:00:39 +00:00
Sanjay Patel 8ae0800ae1 [x86] reassociate integer multiplies using machine combiner pass
Add i16, i32, i64 imul machine instructions to the list of reassociation
candidates.

A new bit of logic is needed to handle integer instructions: they have an
implicit EFLAGS operand, so we have to make sure it's dead in order to do
any reassociation with integer ops.

Differential Revision: http://reviews.llvm.org/D11660



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243756 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 16:21:55 +00:00
Reid Kleckner c136e5507a [COFF] Return symbol VAs instead of RVAs for PE files
This makes llvm-nm consistent with binutils nm on executables and DLLs.
For a vanilla hello world executable, the address of main should include
the default image base of 0x400000.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243755 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 16:14:22 +00:00
Geoff Berry 0dd663b598 [AArch64] Favor extended reg patterns for sub
Summary:
Favor the extended reg patterns over the shifted reg patterns that match
only the operand shift and not the full sign/zero extend and shift.

Reviewers: jmolloy, t.p.northover

Subscribers: mcrosier, aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11569

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243753 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 15:55:54 +00:00
Bruno Cardoso Lopes 8fea35acad [CaptureTracker] Provide an ordered basic block to PointerMayBeCapturedBefore
This patch is a follow up from r240560 and is a step further into
mitigating the compile time performance issues in CaptureTracker.

By providing the CaptureTracker with a "cached ordered basic block"
instead of computing it every time, MemDepAnalysis can use this cache
throughout its calls to AA->callCapturesBefore, avoiding to recompute it
for every scanned instruction. In the same testcase used in r240560,
compile time is reduced from 2min to 30s.

This also fixes PR22348.

rdar://problem/19230319
Differential Revision: http://reviews.llvm.org/D11364

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243750 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 14:31:35 +00:00
Daniel Sanders 289b5e7f39 [regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting def's upwards.
Summary:
This prevents vreg260 and D7 from being merged in:
  %vreg260<def> = LDC1 ...
  JAL <ga:@sin>, <regmask ... list not containing D7 ...>
  %D7<def> = COPY %vreg260; ...
Doing so is not valid because the JAL clobbers the D7.

This fixes the almabench regression in the LLVM 3.7.0 release branch.

Reviewers: MatzeB

Subscribers: MatzeB, qcolombet, hans, llvm-commits

Differential Revision: http://reviews.llvm.org/D11649


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243745 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 12:58:55 +00:00
Jingyue Wu c71235ab7d Refactor: Simplify boolean conditional return statements in lib/Target/NVPTX
Summary: Use clang-tidy to simplify boolean conditional return statements

Reviewers: rafael, echristo, chandlerc, bkramer, craig.topper, dexonsmith, chapuni, eliben, jingyue, jholewinski

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D9983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243734 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 05:09:47 +00:00
Matt Arsenault 30eac4b85a AMDGPU: Fix v16i32 to v16i8 truncstore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243731 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 04:12:04 +00:00