6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-28 19:31:58 +00:00
Code Issues Projects Releases Wiki Activity
36,794 Commits 39 Branches 0 Tags 277 MiB
027ee7e3ca
Commit Graph

83 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
51195af45f Added method to get Mips register numbers 
Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack.
Stack offset calculation bug fixed!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41529 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:13:42 +00:00
Bruno Cardoso Lopes
a2b1bb5296 Changed stack allocation On LowerFORMAL_ARGUMENTS. 
Added comments about new stack allocation.
Expand SelectCC for i32 results


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41527 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:08:16 +00:00
Bruno Cardoso Lopes
dc0c04c0ed Mask directive completed with CalleeSave info 
Comments for Mips directives added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41526 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:06:17 +00:00
Bruno Cardoso Lopes
2d4575ea5a Added methods to record SPOffsets from LowerFORMAL_ARGUMENTS 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41525 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:04:41 +00:00
Bruno Cardoso Lopes
84f47c52fd InlineAsm asm support for integer registers added 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41225 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-21 16:09:25 +00:00
Bruno Cardoso Lopes
edeede2bb5 Instruction Itinerary attribution fixed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41224 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-21 16:06:45 +00:00
Bruno Cardoso Lopes
9710536b44 MipsHi now has ouput flag 
MipsAdd SDNode created to add support to an Add opcode which supports input flag
Added an instruction itinerary to all instruction classes
Added branches with zero cond codes
Now call clobbers all non-callee saved registers
Call w/ register support added
Added DelaySlot to branch and load instructions
Added patterns to handle all setcc, brcond/setcc and MipsAdd instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41161 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:37:46 +00:00
Bruno Cardoso Lopes
055c7eb4a4 Fixed stack frame addressing bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:19:09 +00:00
Bruno Cardoso Lopes
6d32ca0762 support for Schedule included on Mips.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41159 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:18:07 +00:00
Bruno Cardoso Lopes
7ff6fa2503 Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress 
fixed to generate instructions (add, lui) glued!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41158 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:16:30 +00:00
Bruno Cardoso Lopes
250a1714be Couple of small changes. Delay Slot handle header declared. 
Newline added after macros at function init on generated asm!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41157 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:05:24 +00:00
Bruno Cardoso Lopes
e88c36819e Added InstrItinClass support for instruction formats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41156 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:01:28 +00:00
Bruno Cardoso Lopes
0b2cd89a39 Branch Analysis and InsertNoop inserted into header files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41155 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:59:45 +00:00
Bruno Cardoso Lopes
aff42dcf5d createMipsDelaySlotFillerPass added to mips codegen runtime 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41154 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:58:15 +00:00
Bruno Cardoso Lopes
35d2a47994 Added Branch Analysis support 
Added InsertNoop support


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41153 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:56:48 +00:00
Bruno Cardoso Lopes
de6a9411db LowerRETURNADDR removed since it was wrong and does not have utility yet! 
MipsAdd opcode added


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41152 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:54:09 +00:00
Bruno Cardoso Lopes
13d1b7bbb3 InstrItineraryData support on added. 
Added Mips3 ISA feature (needed when supporting R4000 machines)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41151 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:52:27 +00:00
Bruno Cardoso Lopes
9684a697d5 A Pass to insert Nops on intructions with DelaySlot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41150 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:50:47 +00:00
Bruno Cardoso Lopes
a5793899e3 Mips generic fallback instruction schedule support! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41149 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:46:44 +00:00
Dan Gohman
61e729e2e9 More explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40757 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 21:21:54 +00:00
Duncan Sands
36397f5034 Support for trampolines, except for X86 codegen which is 
still under discussion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-27 12:58:54 +00:00
Dan Gohman
b8275a3f6f Don't ignore the return value of AsmPrinter::doInitialization and 
AsmPrinter::doFinalization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40487 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-25 19:33:14 +00:00
Evan Cheng
ffbaccae02 No more noResults. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-21 00:34:19 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 01:14:50 +00:00
Bruno Cardoso Lopes
a4e8200366 Added support for Mips specific GAS directives 
Fixed print immediate 
Fixed Identation on MipsISelDAGToDAG.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39764 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:24:41 +00:00
Bruno Cardoso Lopes
7b155fbd60 Added support for framepointer 
Prologue/Epilogue support fp,ra save/restore and use the stack frame the right
way!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39763 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:21:31 +00:00
Bruno Cardoso Lopes
758dcca57a Now that stack is represented the right way, LOA starts at 0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39761 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:17:41 +00:00
Bruno Cardoso Lopes
2ab22d1b93 Fixed AddLiveOut issues 
FI's created the write way to represent Mips stack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39760 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:16:16 +00:00
Bruno Cardoso Lopes
332a3d22a2 Removed unused immediate PatLeaf, fixed lui instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39759 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 22:47:02 +00:00
Bruno Cardoso Lopes
4215a59a76 Added MipsMachineFunction class, to hold Mips dinamic stack info when inserting Prologue/Epilog 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39758 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 22:44:21 +00:00
Lauro Ramos Venancio
75ce010f7b Assert when TLS is not implemented. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39737 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 17:19:51 +00:00
Chris Lattner
87bdba6d6a The various "getModuleMatchQuality" implementations should return 
zero if they see a target triple they don't understand.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38463 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-09 17:25:29 +00:00
Bruno Cardoso Lopes
972f5896e4 Initial Mips support, here we go! =) 
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-06 07:42:06 +00:00