Evan Cheng
e4086e5086
Use unpcklpd for v2f64 splat.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27249 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 18:59:48 +00:00
Evan Cheng
5aa97b200b
Floating point logical operation patterns should match bit_convert. Or else
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integer vector logical operations would match andp{s|d} instead of pand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27248 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 18:47:40 +00:00
Evan Cheng
074fd57fbd
Add more SSE intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27247 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 06:07:16 +00:00
Evan Cheng
475aecf467
- More shuffle related bug fixes.
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- Whenever possible use ops of the right packed types for vector shuffles /
splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 03:04:49 +00:00
Evan Cheng
c999c745c0
Another entry about shuffles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27245 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 03:03:46 +00:00
Evan Cheng
4f5633883b
- Only use pshufd for v4i32 vector shuffles.
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- Other shuffle related fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 01:30:51 +00:00
Chris Lattner
f3a627262c
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 00:24:13 +00:00
Chris Lattner
246ce96db9
new testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27242 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 00:12:08 +00:00
Chris Lattner
2bbd81064a
Bug fixes: handle constantexpr insert/extract element operations
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Handle constantpacked vectors with constantexpr elements.
This fixes CodeGen/Generic/vector-constantexpr.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 00:11:43 +00:00
Evan Cheng
c46349de29
Added aliases to scalar SSE instructions, e.g. addss, to match x86 intrinsics.
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The source operands type are v4sf with upper bits passes through.
Added matching code for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27240 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 23:51:43 +00:00
Evan Cheng
36b27f3cde
Fixing buggy code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27239 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 23:41:33 +00:00
Evan Cheng
f065a6f711
Don't sort the names before outputing the intrinsic name table. It causes a
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mismatch against the enum table.
This is a part of Sabre's master plan to drive me nuts with subtle bugs that
happens to only affect x86 be. :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27237 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 22:25:56 +00:00
Chris Lattner
cef896e50c
When building a VVECTOR_SHUFFLE node from extract_element operations, make
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sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).
The later is not canonical form, and prevents the PPC splat pattern from
matching. For a particular splat, we go from generating this:
li r10, lo16(LCPI1_0)
lis r11, ha16(LCPI1_0)
lvx v3, r11, r10
vperm v3, v2, v2, v3
to generating:
vspltw v3, v2, 3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27236 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 22:19:47 +00:00
Chris Lattner
66445d3e0a
Canonicalize VECTOR_SHUFFLE(X, X, Y) -> VECTOR_SHUFFLE(X,undef,Y')
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27235 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 22:11:53 +00:00
Chris Lattner
bfc1a79c5b
new testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 20:32:12 +00:00
Chris Lattner
d7648c8934
Turn a series of extract_element's feeding a build_vector into a
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vector_shuffle node. For this:
void test(__m128 *res, __m128 *A, __m128 *B) {
*res = _mm_unpacklo_ps(*A, *B);
}
we now produce this code:
_test:
movl 8(%esp), %eax
movaps (%eax), %xmm0
movl 12(%esp), %eax
unpcklps (%eax), %xmm0
movl 4(%esp), %eax
movaps %xmm0, (%eax)
ret
instead of this:
_test:
subl $76, %esp
movl 88(%esp), %eax
movaps (%eax), %xmm0
movaps %xmm0, (%esp)
movaps %xmm0, 32(%esp)
movss 4(%esp), %xmm0
movss 32(%esp), %xmm1
unpcklps %xmm0, %xmm1
movl 84(%esp), %eax
movaps (%eax), %xmm0
movaps %xmm0, 16(%esp)
movaps %xmm0, 48(%esp)
movss 20(%esp), %xmm0
movss 48(%esp), %xmm2
unpcklps %xmm0, %xmm2
unpcklps %xmm1, %xmm2
movl 80(%esp), %eax
movaps %xmm2, (%eax)
addl $76, %esp
ret
GCC produces this (with -fomit-frame-pointer):
_test:
subl $12, %esp
movl 20(%esp), %eax
movaps (%eax), %xmm0
movl 24(%esp), %eax
unpcklps (%eax), %xmm0
movl 16(%esp), %eax
movaps %xmm0, (%eax)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27233 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 20:28:38 +00:00
Chris Lattner
5b2316e2b0
Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27232 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 20:24:43 +00:00
Chris Lattner
354cde9a7e
new node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27231 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 19:54:42 +00:00
Chris Lattner
eda6dfd5e4
Add a new node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 19:54:11 +00:00
Chris Lattner
4fbdd59f4f
Don't crash on X^X if X is a vector. Instead, produce a vector of zeros.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27229 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 19:11:05 +00:00
Chris Lattner
f35b29765b
Add an assertion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27228 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 19:04:49 +00:00
Chris Lattner
d732a2915b
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27227 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 18:56:23 +00:00
Jim Laskey
b3e7be25be
Refactor address attributes. Add base register to frame info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 14:58:32 +00:00
Jim Laskey
a99791886d
Expose base register for DwarfWriter. Refactor code accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 13:48:33 +00:00
Jim Laskey
bf7637d590
More bulletproofing of llvm.dbg.declare.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27224 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 13:45:20 +00:00
Jim Laskey
2d2a6131da
Added missing paren on behalf of Ramana Radhakrishnan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27223 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 10:17:11 +00:00
Evan Cheng
ed4ca7f6c3
Missed X86::isUNPCKHMask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 08:27:15 +00:00
Evan Cheng
9bbfd4f68c
movlps and movlpd should be modeled as two address code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27221 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 07:01:28 +00:00
Evan Cheng
6a6d354d4c
Update
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27220 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 06:55:45 +00:00
Evan Cheng
be296ac5ca
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27219 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 06:53:49 +00:00
Evan Cheng
2064a2b47e
* Prefer using operation of matching types. e.g unpcklpd rather than movlhps.
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* Bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27218 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 06:50:32 +00:00
Evan Cheng
ec1ab444a1
Use movhpd is even better than movlhps.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27217 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 06:40:57 +00:00
Nate Begeman
816cee2216
Fix a couple typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27216 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 04:18:18 +00:00
Nate Begeman
98e70cc124
Add a few more altivec intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 04:15:58 +00:00
Jeff Cohen
5659b41311
Keep Visual Studio informed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27214 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 04:01:27 +00:00
Chris Lattner
9bade4de9d
These don't directly map to gcc intrinsics any more.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27213 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 03:52:36 +00:00
Evan Cheng
4c4a2e2a0d
Added a couple of entries about movhps and movlhps.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27212 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 02:49:12 +00:00
Evan Cheng
000e4dd54b
All unpack cases are now being handled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27211 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 02:44:05 +00:00
Evan Cheng
4fcb922c70
- Clean up / consoladate various shuffle masks.
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- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27210 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 02:43:26 +00:00
Chris Lattner
ecc219b8d4
implement a bunch more intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27209 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 02:29:37 +00:00
Chris Lattner
858b35eaf7
Add some more intrinsics: rotates, fp rounds, and random other fp instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27208 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 02:28:48 +00:00
Evan Cheng
78b9ec3820
getVectorTyppe(MVT::i64, 2) ==> MVT::v2i64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27207 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 01:59:17 +00:00
Chris Lattner
572f974939
Add lvxl
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27206 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 01:49:27 +00:00
Chris Lattner
7f20b13518
Use normal lvx for scalar_to_vector instead of lve*x. They do the exact
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same thing and we have a dag node for the former.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27205 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 01:43:22 +00:00
Jim Laskey
8156a0d224
Regression test for the handling of nulls as arguments to debug intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 01:34:14 +00:00
Jim Laskey
aaa80ebd10
More bulletproofing of DebugInfoDesc verify.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27203 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 01:30:18 +00:00
Chris Lattner
b026e70462
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums.
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Also, don't emit dynamic checks when we can compute them statically
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 00:41:33 +00:00
Chris Lattner
48b61a729d
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 00:40:33 +00:00
Evan Cheng
0038e59803
Model unpack lower and interleave as vector_shuffle so we can lower the
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intrinsics as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27200 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 00:39:58 +00:00
Chris Lattner
ef8ef91634
Tblgen doesn't like multiple SDNode<> definitions that map to the same
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enum value. Split them into separate enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27199 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 00:39:06 +00:00